National Instruments PXIe-6674, Руководство пользователя

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Table 4. Resolution by Frequency Ranges
Clock Generation Frequency Resolution
18.75 MHz to 37.5 MHz 0.355 ΩHz
37.5 MHz to 75 MHz 0.711 ΩHz
75 MHz to 150 MHz 1.42 ΩHz
150 MHz to 300 MHz 2.84 ΩHz
300 MHz to 600 MHz 5.68 ΩHz
600 MHz to 1 GHz 11.4 ΩHz
ClkIn
CLKIN can be routed to the FPGA and used as a trigger synchronization clock inside the
FPGA.
Because the PXIe-6674 is not designed for use in the system timing slot, it can not drive
CLKIN to PXI_CLK10_IN for overdriving PXI_CLK10 and PXIe_CLK100. The PXIe-6674T
is required for this functionality.
PXIe_DSTARA, PXIe_DSTARB, and PXIe_DSTARC
The PXI Express architecture includes a set of three high speed differential signal paths to
connect the system timing slot to each PXI Express peripheral slot (up to 17 peripheral slots).
These signals are PXIe_DSTARA, PXIe_DSTARB, and PXIe_DSTARC.
•
PXIe_DSTARA—PXIe_DSTARA is used to send clock signals from the system timing
slot to each PXI Express peripheral slot in a star configuration. PXIe_DSTARA uses
LVPECL signaling and closely matched trace lengths to achieve low skew, high speed
clock routing capabilities. The PXIe-6674 can route its DSTARA to CLKOUT and
PFI_LVDS.
• PXIe_DSTARB—PXIe_DSTARB is used to send trigger signals from the system timing
slot to each PXI Express peripheral slot in a star configuration. PXIe_DSTARB uses
LVDS signaling and closely matched trace lengths to achieve faster, more precise
triggering than is achievable with PXI_STAR or PXI_TRIG.
• PXIe_DSTARC—PXIe_DSTARC is used to send trigger signals from each PXI Express
peripheral slot to the system timing slot in a star configuration. PXIe_DSTARC uses
LVDS signaling and closely matched trace lengths and can be used to send a trigger
signal or clock signal to the system timing module.
PFI_LVDS<0..2>
To allow for sending and receiving signals between system timing modules that are too fast for
single ended PFI signaling, two PFI SMA connectors can be combined to send or receive
LVDS signals.
Table 5. on page 14 shows the relation between the front panel SMA
connectors used for PFI and PFI_LVDS.
PXIe-6674 User Manual | © National Instruments | 13