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Chapter 3
Signal Acquisition
Time Domain Mode Acquisitions
Time domain mode is an acquisition mode available on the PXIe-4480/4481 which extends the
sample rate and bandwidth beyond that of traditional DSA devices. The higher sample rate and
bandwidth of time domain mode allows users to measure events in which sudden changes need
to be analyzed and understood. These applications include high speed impact, explosive shock,
and many others that produce a sharp step response. NI-DAQmx uses time domain mode
automatically any time the requested sample rate is above 1.25 MS/s. For sample rates at and
below 1.25 MS/s, frequency domain mode is always used.
To allow for higher bandwidth measurements, time domain mode significantly alters the digital
signal processing normally done by the Delta-Sigma ADC. Instead of the sharp anti-alias
filtering and decimation used in a frequency domain mode, time domain mode uses a single FIR
filter applied directly to the Delta-Sigma ADC modulator output. Figure 3-1 illustrates the key
processing step involved in a time domain mode acquisition.
Figure 3-1.
Time Domain Mode Block Diagram
Analog Front End
Before being digitized, the analog input signal is passed through the same analog front end
circuitry as in a frequency domain mode acquisition. This means that time domain mode can use
all of the same analog channel configurations available on the PXIe-4480/4481. In addition to
the channel configuration features, the analog front end also performs anti-alias filtering with
respect to the modulator frequency of the Delta-Sigma ADC. The bandwidth of the analog front
end and the digital FIR filter combined determine the step response performance of time domain
mode.
Delta-Sigma ADC Modulator
After passing through the analog front end for signal conditioning, the signal is digitized by the
Delta-Sigma ADC’s modulator at a rate of 20 MS/s. In Delta-Sigma ADCs, the modulator
is designed to employ a technique called noise shaping. Noise shaping attempts to place all
quantization noise above a certain frequency so that digital filtering can be used to remove it.
In a frequency domain mode acquisition, this would be done with the sharp anti-alias filters
normally found in Delta-Sigma ADCs. In time domain mode, these sharp filters are bypassed
and the raw modulator data is sent directly to the FPGA of the PXIe-4480/4481 module where
it is filtered. Figure 3-2 shows the FFT power spectrum of the modulator data when the analog
inputs are shorted to ground with ±10 V range selected.
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