National Instruments PXI Express PXIe-1066DC, Руководство пользователя

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PXIe-1066DC User Manual
The system timing slot has 3 dedicated differential pairs (PXIe_DSTAR) connected from the
TP1 and TP2 connectors to the XP3 connector for each PXI Express peripheral or hybrid
peripheral slot, as well as routed back to the XP3 connector of the system timing slot as shown
in Figure 1-3. The PXIe_DSTAR pairs can be used for high-speed triggering, synchronization
and clocking. Refer to the
PXI Express Specification
for details.
The system timing slot also has a single-ended (PXI Star) trigger connected to every slot. Refer
to Figure 1-3 for details.
The system timing slot has a pin (PXI_CLK10_IN) through which a system timing module may
source a 10MHz clock to which the backplane will phase-lock. Refer to the
System Reference
Clock
section for details.
The system timing slot has a pin (PXIe_SYNC_CTRL) through which a system timing module
can control the PXIe_SYNC100 timing. Refer to the
PXI Express Specification
and the
PXIe_SYNC_CTRL
section of this chapter for details.
Figure 1-3.
PXIe_DSTAR and PXI Star Connectivity Diagram
P2
P1
XP4
XP
3
TP2
TP1
P2
P1
P2
P1
P2
P1 P1 P1 P1
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
P2
P1
P2
P1
P2
P1
P2
P1
P2
P1 P1
XP4
XP
3
XP2
XP1
PXIe_D
S
T
AR 11
PXIe_D
S
T
AR
8
PXIe_D S TAR 6
PXIe_D S TAR 5
PXIe_D S TAR 3
PXIe_D S TAR 2
PXIe_D S TAR 1
PXIe_D
S
T
AR 1
PXIe_D S TAR 4
PXI S TAR 3
PXI S TAR 1
PXI S TAR 2 PXI S TAR 9
PXI S TAR 7
PXI S TAR 6
PXI S TAR 5
PXI S TAR 4
PXI S TAR 8
PXI S TAR 11
PXI D S TAR 10
PXI S TAR 1 3
PXI S TAR 12
PXI S TAR 15
PXI S TAR 14
PXI S TAR 16
PXI S TAR 0
1
8 9 10
7
H
11
H H
12
H
1 3 14 15
6 5
4 3 2 16 17 1 8