Chapter 3
Analog Output
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Outputting the AO Sample Clock Signal
You can configure the PFI 5/AO SAMP CLK pin to output the
ao/SampleClock signal. The output pin reflects the ao/SampleClock signal
regardless of what signal you specify as its source.
The output is an active high pulse. Figure 3-9 shows the timing behavior of
the PFI 5/AO SAMP CLK pin configured as an output.
Figure 3-9.
PFI 5/AO SAMP CLK Timing Behavior
The PFI 5/AO SAMP CLK is configured as an input by default.
Other Timing Requirements
A counter on your device internally generates ao/SampleClock unless you
select some external source. The ao/StartTrigger signal starts this counter.
It is stopped automatically by hardware once a finite acquisition completes
or manually through software. When using an internally generated
ao/SampleClock in NI-DAQmx, you can also specify a configurable delay
from the ao/StartTrigger to the first ao/SampleClock pulse. By default, this
delay is two ticks of the ao/SampleClockTimebase signal.
t
w
t
w
= 50 to 75 ns
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