Chapter 2
Theory of Operation
©
National Instruments Corporation
2-3
Figure 2-3.
PCI-6023E, PCI-6024E, and PCI-6025E Block Diagram
Timing
PFI / Trigger
DIO (24)
I/O Connector
PCI Connector
Digital I/O
A/D
Converter
EEPROM
EEPROM
Configuration
Memory
PGIA
1
Calibration
Mux
Analog Mode
Multiplexer
Analog
Input
Muxes
Voltage
REF
Calibration
DACs
Dither
Generator
Calibration DACs
82C55A
DAC0
DAC1
NOT ON 6023E
Analog Output
DAQ - STC
Analog Input
Timing/Control
Analog Output
Timing/Control
Digital I/O
Trigger
Interface
Counter/
Timing I/O
RTSI Bus
Interface
DMA/
Interrupt
Request
Bus
Interface
(8)
(8)
AI Control
Address/Data
Control
Data
Analog
Input
Control
EEPROM
Control
DMA
Interface
DAQ-
APE
DAQ-STC
Bus
Interface
I/O
Bus
Interface
MINI-
MITE
Generic
Bus
Interface
PCI
Bus
Interface
IRQ
DMA
AO Control
ADC
FIFO
Address
RTSI Connector
DIO Control
6025E Only
3
6