Chapter 5
Theory of Operation and Register-Level Programming
©
National Instruments Corporation
5-5
Bits ADO2 and ADO3 select each individual AMUX-64T board in a
multiple-board configuration. If you use only one AMUX-64T board,
ADO2 and ADO3 are ignored. If you use two AMUX-64T boards, only
ADO2 is used. An address map for the different channel groups is shown
in Table 5-2.
Observe that channels on a single AMUX-64T are labeled 0 through 63.
If you use more than one AMUX-64T board, however, channel numbering
changes (see Table 5-2).
When you use four AMUX-64T boards with channel addresses ranging
from 0 to 255, eight bits are required to address any single channel. This
8-bit address must be split and written to the Digital Output Register and
the Mux-Gain Register (the Mux-Mem Register in the AT-MIO-16F-5).
Figure 5-3 shows the mapping of the 8-bit channel address to the Digital
Output and Mux-Gain Registers. To select a given channel, write the two
least significant bits to bits ADO0 and ADO1 of digital I/O port A, the four
middle bits to bits MA<3..0> of the Mux-Gain Register, and the two most
significant bits to bits ADO3 and ADO2 of digital I/O port A. Notice that
for differential operation, bit MA3, which corresponds to bit 5 of the
channel address, becomes a don’t care bit. This occurs because only eight
multiplexers are used for differential operation.
Table 5-2.
Multiple AMUX-64T Board Addressing
Digital Port A Bits
ADO<3..2>
Board Selected
Channels Selected
00
A
0–63
01
B
64–127
10
C
128–191
11
D
192–255
