©
National Instruments Corporation
15
NI 6584R User Guide and Specifications
Specifications
Channel Specifications (RS-485/422)
Type of connectors .................................................1 VHDCI (Connector 0)
Number of RS-485/422 I/O channels ....................16 data
Direction control of data channels .........................Individual TX and RX enables
Power up state ........................................................Drivers disabled, receivers enabled
I/O compatibility....................................................RS-485/422 (differential)
Maximum input differential voltage ......................5 V
Characteristic impedance .......................................100
Ω
differential nominal
Termination impedance..........................................100
Ω
differential nominal or open
1
Maximum data rate ................................................16 Mbit/s per channel nominal
(requires proper termination on the bus)
Figures 10 and 11 show the block diagrams for the full and half duplex versions of the NI 6584.
Figure 10.
NI 6584 Block Diagram (Full Duplex)
Figure 11.
NI 6584 Block Diagram (Half Duplex)
Note
The VHDCI connector shown in the preceding figures is labeled
CONNECTOR 0 (Ports 1–8)
on the front panel of the NI 6584.
1
Terminated devices (199496-01/199496-02) have 100
Ω
termination. Unterminated devices (199496-03/199496-04) are open.
D
a
t
a
from
NI FlexRIO
FPGA Module
Output En
ab
le
from NI FlexRIO
FPGA Module
D
a
t
a
to
NI FlexRIO
FPGA Module
Input En
ab
le
from NI FlexRIO
FPGA Module
VHDCI
VHDCI
VHDCI
VHDCI
TX
RX
100
Ω
or open
1
D
a
t
a
from
NI FlexRIO
FPGA Module
Output En
ab
le
from NI FlexRIO
FPGA Module
D
a
t
a
to
NI FlexRIO
FPGA Module
Input En
ab
le
from NI FlexRIO
FPGA Module
VHDCI
VHDCI
100
Ω
or open
1
TX
RX
