National Instruments 6584R, Руководство пользователя и технические характеристики

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NI 6584R User Guide and Specifications 10 ni.com
Creating an FPGA Target VI
1. In the Project Explorer window, right-click My Computer and select New»Targets and
Devices .
2. In the Add Targets and Devices on My Computer window, select the Existing Target or Device
radio button and expand the FPGA Target. The target is displayed.
3. Select your device and click OK . The target and target properties are loaded into the project tree.
4. In the Project Explorer window, right-click the FPGA target and select New»VI . A blank VI
opens.
5. Select Window Show»Block Diagram to open the block diagram window.
6. In the Project Explorer window, select FPGA Target (RIO x , PXI-79 xx R) .
7. Right-click IO Module and select Properties . In the General category, you can see the available
component-level IP (CLIP) for the NI 6584 in the Component Level IP pane. If the category
information is dimmed, select the
Enable IO Module checkbox.
Note For more information about CLIP for the NI 6584, refer to the NI 6584 Component-Level
Intellectual Property section of this document.
8. Select NI 6584 Full-Duplex to configure the software for the full duplex version of the NI 6584R.
9. Select NI 6584 Basic Connector to use the connector-based CLIP. Click OK .
10. In the Project Explorer window, select IO Module (NI 6584 Full-Duplex : NI 6584 Basic
Connector) .
11. Select RX , TX , and TX_Enable and drag them onto the block diagram.
12. Add a While Loop around the three Data nodes.
13. Wire an indicator from the output of the IO Module\RX .
14. Wire a control to the input of the IO Module\TX .
15. Wire a numeric constant to the input of the IO Module\TX_Enable node. Set the value to 65,535.
(This enables all 16 TX channels like
0xFFFF
in hexadecimal.)
16. Wire a False constant to the stop condition of the While Loop.
Your block diagram should now resemble the block diagram in Figure 6.
Figure 6. Data RW (FPGA).vi Block Diagram
17. Save the VI as
Data RW (FPGA).vi
.
18. Close the VI.
19. In the Project Explorer window under My Computer , expand the tree view for your device,
right-click Data RW (FPGA).vi and select Compile to compile the files for your target.