National Instruments 6584R, Руководство пользователя и технические характеристики

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© National Instruments Corporation 11 NI 6584R User Guide and Specifications
The Generating Intermediate Files window opens and displays the compilation progress.
The LabVIEW FPGA Compile Server window opens and runs. The compilation takes several
minutes.
20. When the compilation finishes, click the Stop Server button.
21. Click OK in the Successful Compile Report window. Close the VI without saving changes.
Creating a Host VI
1. In the Project Explorer window, right-click My Computer and select New»VI . A blank VI opens.
Open the block diagram window.
2. Add the Open FPGA VI Reference function (from the FPGA Interface palette) to the block
diagram.
3. Right-click the Open FPGA VI Reference function and select Configure Open FPGA VI
Reference .
4. In the Configure Open FPGA VI Reference window, select the VI option button.
5. In the Select VI window that opens, select Data RW (FPGA).vi under your device, and click OK .
6. Select the Run the FPGA VI check box if it is not already selected.
7. Click OK in the Configure Open FPGA VI Reference window. The new target name appears
under the Open FPGA VI Reference function on the block diagram.
8. Add a While Loop to the block diagram with a control on the loop condition.
9. Add the Read/Write Control function (from the FPGA Interface palette) inside the While Loop.
10. Wire the Open FPGA VI Reference function FPGA VI Reference Out indicator to the FPGA VI
Reference In control on the Read/Write Control function.
11. Wire the Open FPGA VI Reference function error out indicator to the Read/Write Control
function error in control.
12. Click the Unselected input of Read/Write Control function and select IO Module\TX .
13. Wire a control to the IO Module\TX input.
14. Expand the bottom of the Read/Write Control function to expose another input. Click the new input
and select IO Module\RX .
15. Wire an indicator from the IO Module\RX output.
16. Add the Close FPGA VI Reference function (from the FPGA Interface palette) outside the While
Loop.
17. Wire the Read/Write Control function FPGA VI Reference Out indicator to the Close FPGA VI
Reference function FPGA VI Reference In control.
18. Wire the Read/Write Control error out parameter to the Close FPGA VI Reference error in
parameter.
19. Right-click the stop condition of the While Loop and add an control. Label this control
Stop
.