Chapter 3
Hardware Overview
3-6
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Many of these timing signals are also available as outputs on the RTSI pins,
as indicated in the
section in this chapter, and on the PFI
pins, as indicated in Chapter 4,
Programmable Function Inputs
Ten PFI pins are available on the device connector as PFI<0..9> and are
connected to the device’s internal signal routing multiplexer for each
timing signal. Software can select any one of the PFI pins as the external
source for a given timing signal. It is important to note that any of the PFI
pins can be used as an input by any of the timing signals and that multiple
timing signals can use the same PFI simultaneously. This flexible routing
scheme reduces the need to change physical connections to the I/O
connector for different applications.
You can also individually enable each of the PFI pins to output a specific
internal timing signal. For example, if you need the UPDATE* signal as an
output on the I/O connector, software can turn on the output driver for the
PFI5/UPDATE* pin.
Device and RTSI Clocks
Many device functions require a frequency timebase to generate the
necessary timing signals for controlling A/D conversions, DAC updates, or
general-purpose signals at the I/O connector.
These devices can use either its internal 20 MHz timebase or a timebase
received over the RTSI bus. In addition, if you configure the device to use
the internal timebase, you can also program the device to drive its internal
timebase over the RTSI bus to another device that is programmed to receive
this timebase signal. This clock source, whether local or from the RTSI bus,
is used directly by the device as the primary frequency source. The default
configuration at startup is to use the internal timebase without driving the
RTSI bus timebase signal. This timebase is software selectable.
♦
PXI-6035E
The RTSI clock connects to other devices through the PXI trigger bus on
the PXI backplane. The RTSI clock signal uses the PXI trigger <7> line for
this connection.
