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2-
1
1
ADV7403
Pin No.
Mnemonic
Type
Function
mode the crystal must be a fundamental crystal.
46
ELPF
O
The recommend external loop filter must be connected to this
ELPF pin.
70, 59
TEST0 -
TEST1
O
These pins should be unconnected
15 SFL/SYNC_O
UT
O
SFL (Subcarrier Frequency Lock); this pin contains a serial
output stream which can be used to lock the subcarrier
frequency when this decoder is connected to any Analog
Devices digital video encoder. SYNC_OUT is the sliced sync
output signal only available in CP mode.
64
REFOUT
O
Internal voltage reference output.
65
CML
O
The CML pin is a common-mode level for the internal ADCs.
61, 62
CAPY1–
CAPY2
I
ADC capacitor network.
68, 69
CAPC1–
CAPC2
I
ADC capacitor network.
67
BIAS
O
BIAS is an external bias setting pin. Connect the
recommended resistor between pin and ground.
86
HS_IN/CS_IN
I
Can be configured in CP mode to be either a digital HS input
signal or a digital CS input signal used to extract timing in a
5-wire or 4-wire RGB mode.
85
VS_IN
I
VS input signal used in CP mode for 5-wire timing mode.
79
DE_IN
I
DE_IN is a data enable input signal used in 24-bit digital
input port mode, for example,
24-bit RGB data from a DVI Rx IC.
35
DCLK_IN
I
DCLK_IN is a clock input signal used in 24-bit digital input
mode (e.g. 24-bit RGB data from a DVI Rx IC) and also in
digital CVBS input mode.
52
SOG
I
SOG is a sync on green input used in embedded sync mode.
77
SOY
I
SOY is a sync on luma input used in embedded sync mode.
1.8 Absolute Maximum Ratings
Table 2: Absolute Maximum Ratings
Parameter Rating
A
VDD
to AGND
4 V
D
VDD
to DGND
2.2 V
P
VDD
to AGND
2.2 V
D
VDDIO
to DGND
4 V
D
VDDIO
to A
VDD
0.3 V to +0.3V
P
VDD
to D
VDD
0.3 V to +0.3 V
D
VDDIO
– P
VDD
0.3 V to +2 V
D
VDDIO
– D
VDD
0.3 V to +2 V
A
VDD
– P
VDD
0.3 V to +2 V
A
VDD
– D
VDD
0.3 V to +2 V
Digital Inputs Voltage to DGND
DGND 0.3 V to D
VDDIO
+ 0.3 V
Digital Outputs Voltage to DGND
DGND 0.3 V to D
VDDIO
+ 0.3 V
Analog Inputs to AGND
AGND 0.3 V to A
VDD
+ 0.3 V
Maximum Junction Temperature
125°C
Содержание T737
Страница 1: ...L A U N A M E C I V R E S AV Surround Sound Receiver T737 AV Surround Sound Receiver T737 ...
Страница 6: ...1 6 DISASSEMBLY 1 REMOVAL OF TOP COVER 2 REMOVAL OF FRONT PANEL ...
Страница 7: ...1 7 PRINCIPAL PARTS LOCATION ...
Страница 9: ...T737AH EXPLODED VIEW Graphite 1 9 1 10 SEE NOTE SEE NOTE SEE NOTE ...
Страница 11: ...T737C EXPLODED VIEW Graphite 1 12 1 13 SEE NOTE SEE NOTE SEE NOTE ...
Страница 13: ...T737CT EXPLODED VIEW Titanium 1 15 1 16 SEE NOTE SEE NOTE SEE NOTE ...
Страница 17: ...2 4 IC201 T5CC1 Microcontrollers 2 4 ...
Страница 25: ...LC74763 IC108 OSD IC 2 12 ...
Страница 26: ...IVERS 2 13 ...
Страница 27: ...IVERS 2 13 2 14 ...
Страница 28: ...IC113 NJM2566V VIDEO AMP 2 15 ...
Страница 31: ...2 18 IC157 ST232CDR RS 232 DRIVERS RECEIVERS BLOCK DIAGRAM IC107 NJM2535 ...
Страница 36: ...BLOCK DIAGRAM 2 23 ...
Страница 38: ...IC147 TC74VCX541FT OCTAL BUS BUFFER 2 25 ...
Страница 41: ...BLOCK DIAGRAM AUDIO PART 2 28 2 29 ...
Страница 42: ...BLOCK DIAGRAM MCU DSP PART 2 30 2 31 ...
Страница 43: ...BLOCK DIAGRAM VIDEO PART 2 32 2 33 ...
Страница 47: ...SCHEMATIC DIAGRAM MCU PART 3 40 3 41 ...
Страница 48: ...SCHEMATIC DIAGRAM DSP CODEC WITH DIR PART 3 42 3 43 ...
Страница 56: ...PRINTED CIRCUIT BOARDS FRONT TOP VIEW 2 58 2 59 ...
Страница 57: ...FRONT BOTTOM VIEW 2 60 2 61 ...
Страница 58: ...MAIN TOP VIEW MAIN BOTTOM VIEW 2 62 2 63 ...
Страница 59: ...INPUT TOP VIEW 2 64 2 65 ...
Страница 60: ...INPUT BOTTOM VIEW 2 66 2 67 ...
Страница 61: ...VIDEO TOP VIEW VIDEO BOTTOM VIEW 2 68 2 69 ...
Страница 62: ...HDMI TOP VIEW HDMI BOTTOM VIEW 2 70 2 71 ...
Страница 63: ...AMP TOP VIEW 2 72 2 73 ...
Страница 64: ...AMP BOTTOM VIEW 2 74 2 75 ...