Chapter 3- BIOS Setup
Multi-Tech Systems, Inc. Single Board Computer IAC-F696 User’s Guide (S000349A)
33
Fast R-W Turn Around:
This setting activates or deactivates a timing rapid of the cycles of lettura-
scrittura. If memories of low quality are used or a system bus specifies outside deactivating this mode,
not to have problems of instability of the system is advisable. Activating it with memories to high
performance is possible. It is not possible to pretend resulted convincing from desks of memory of low
quality
.
System BIOS Cacheable: Selecting Enabled allows caching of the system BIOS ROM at F0000h -
FFFFFh, resulting in better system performance. However, if any program writes to this memory area, a
system error may result. The settings are Enabled and Disabled.
Video RAM Cacheable: The choices: Enabled (Default) and Disabled.
Frame Butter Size: The choices: 2M, 4M, and 8M(Default).
AGP Aperture Size: Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is a
portion of the PCI memory address range dedicated for graphics memory address space. Host cycles
that hit the aperture range are forwarded to the AGP without any translation. The choices: 128M, 64M,
32M, 16M, 8M, and 4M.
CPU to PCI Write Buffer: When this field is Enabled, writes from the CPU to the PCI bus is buffered, to
compensate for the differences between the CPU and the PCI bus. When disabled, the writes are not
buffered and the CPU must wait until the write is complete before starting another cycle. The default
setting is Enabled.
PCI Dynamic Bursting: This item allows you to enable or disable the PCI dynamic bursting function. The
settings are Enabled or Disabled.
PCI Master 0 WS Write: When enabled, writes to the PCI bus and are executed with zero wait states.
The settings are Enabled or Disabled.
PCI Delay Transaction: The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select Enabled to support compliance with PCI specification version 2.1. The
settings are Enabled or Disabled.
PCI#2 Access #1 Retry: When disabled, PCI#2 will not be disconnected until access finishes. When
enabled, PCI#2 will be disconnected if max retries are attempted without success. The default setting is
Enabled.
AGP Master 1 WS Write: Implements a single delay when writing from the AGP Bus. Normally, two wait
states are used, allowing for greater stability, but check with your motherboard manufacturer to see if
they have already implemented a Master latency of zero, in which case the lowest writing here of 1 will
reduce performance.
AGP Master 1 WS Read: Implements a single delay when reading from the AGP Bus. Normally, two wait
states are used, allowing for greater stability, but check with your motherboard manufacturer to see if
they have already implemented a Master latency of zero, in which case the lowest reading here of 1 will
reduce performance.
Select Display Device: Select Display for CRT LCD Model.
Panel Type:
Please select the type of panel you are incorporating with our single board computer.
Consult your panel manual for detail information.
