MSK MSK5059RH Скачать руководство пользователя страница 3

 

 

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time of the power switch. 

A boost voltage of at least 2.8V is required throughout the on-

time of the switch to guarantee that it remains saturated. The boost components chosen 
for the evaluation board are a 0.33µF capacitor (C2), and a 1N914 or 1N4148 diode 
(CR2). The anode is connected to the unregulated input voltage. This generates a voltage 
across the boost capacitor nearly identical to the input. In applications having output 
voltages greater than 2.8V and significantly higher input voltages, the anode may be 
connected to the output voltage to further improve efficiency. The default configuration 
is with the anode on the input. Remove CR2 and install CR3 to connect the boost diode to 
the output voltage. Efficiency is not affected by the capacitor value, but the capacitor 
should have an ESR of less than 1

 to ensure that it can be recharged fully under the 

worst-case condition of minimum input voltage. Almost any type of film or ceramic 
capacitor will work fine. 
 
For maximum efficiency, switch rise and fall times are made as short as possible. To 
prevent radiation and high frequency resonance problems, proper layout of the 
components connected to the switch node is essential. 
 

Loop Stability 
 

The compensation for MSK5059RH evaluation board is a 1000pF capacitor in parallel 
with a series RC consisting of a 1500pF capacitor and a 10k

 resistor. This 

compensation was selected for use with the default components on this evaluation board. 
New values may have to be selected if different components are used. The values for loop 
compensation components depend on parameters which are not always well controlled. 
These include inductor value (±30% due to production tolerance, load current and ripple 
current variations), output capacitance (±20% to ±50% due to production tolerance, 
temperature, aging and changes at the load), output capacitor ESR (±200% due to 
production tolerance, temperature and aging), and finally, DC input voltage and output 
load current. This makes it important to check out the final design to ensure that it is 
stable and tolerant of all these variations. 
 
Phase margin and gain margin are measures of stability in closed loop systems. Phase 
margin indicates relative stability, the tendency to oscillate during its damped response to 
an input change such as a step function.  Moreover, the phase margin measures how 
much phase variation is needed at the gain crossover frequency to lose stability. Gain 
margin is also an indication of relative stability. Gain margin measures how much the 
gain of the system can increase before the system becomes unstable.    Together, these 
two numbers give an estimate of the safety margin for closed-loop stability. The smaller 
the stability margins, the more likely the circuit will become unstable. 
 

One method for measuring the stability of a feedback circuit is a network analyzer. Use 
an isolation transformer / adapter to isolate the grounded output analyzer from the 
feedback network. Remove the jumper across R4 and connect the output of the isolation 
transformer across R4 using TP1 and TP2 terminals. Use 1M-ohm or greater probes to 
connect the inputs of the analyzer to TP1 and TP2. Use GND

3

 for the ground reference 

for the network analyzer inputs. 

Inject a swept frequency signal into the feedback loop, 

Содержание MSK5059RH

Страница 1: ...new designs with ample real estate to make changes and evaluate results Evaluation early in the design phase reduces the likelihood of excess ripple instability or other issues from becoming a proble...

Страница 2: ...12V When configured for an output voltage of 2 5V or greater the MSK5059RH will function normally with input voltages up to the maximum rating of 15V If operating the MSK5059RH at less than the minimu...

Страница 3: ...alues for loop compensation components depend on parameters which are not always well controlled These include inductor value 30 due to production tolerance load current and ripple current variations...

Страница 4: ...ansients more visible A well behaved loop will settle back quickly and smoothly Figure 3 C and is termed critically damped whereas a loop with poor phase or gain margin will either ring as it settles...

Страница 5: ...logic low to greater than 2 2V with a duty cycle between 10 and 90 The synchronization frequency must be greater than the free running oscillator frequency and less than 1 MHz This means that minimum...

Страница 6: ...itance is altered The output contains very narrow voltage spikes because of the parasitic inductance of C5 Ceramic capacitors C6A and B remove these spikes on the demo board In application trace induc...

Страница 7: ...DC 2 for 50 DC 90 DC Duty cycle VOUT VIN Maximum output current is then reduced by one half peak to peak inductor current IMAX IP VOUT VIN VOUT 2 L f VIN Example with VOUT 5V VIN 8V DC 5 8 0 625 L 3...

Страница 8: ...Switching Frequency Vin 5 0V IOUT 2 0A kHz 500 Output Ripple Voltage Vin 5 0V IOUT 2 0A mVp p 25 Line Regulation 4 3V Vin 15V IOUT 2 0A 0 1 Load Regulation Vin 5 0V IOUT 50mA to 2 0A 0 3 Efficiency V...

Страница 9: ...CWR29FC227K C5B 220 uF Low ESR tantalum AVX TAZH227K010L CWR29FC227K C5C 220 uF Low ESR tantalum AVX TAZH227K010L CWR29FC227K C5D N A C5E N A C5F N A C6A 1210 Ceramic cap 1 0uF AVX 12103C105KAT C6B 8...

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