2-22
THEORY OF OPERATION
The low speed limited data output (PL, DPL, and trunking LS) appears at U504-pin18, where it
connects to the µP U403-pin 80.
The low speed data is read by the µP at twice the frequency of the sampling waveform; a latch
configuration in the ASFIC CMP stores one bit every clock cycle. The external capacitors C5028,
and C5026 set the low frequency pole for a zero crossings detector in the limiters for PL and HS
data. The hysteresis of these limiters is programmed based on the type of received data.
10.2
Alert Tone Circuits
When the software determines that it needs to give the operator an audible feedback (for a good
key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures),
it sends an alert tone to the speaker. It does so by sending SPI BUS data to U504 which sets up the
audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways:
internally by the ASFIC CMP, or externally using the µP and the ASFIC CMP.
The allowable internal alert tones are 304, 608, 911, and 1823 Hz. In this case a code contained
within the SPI BUS load to the ASFIC CMP sets up the path and determines the tone frequency,
and at what volume level to generate the tone. (It does not have to be related to the voice volume
setting.)
For external alert tones, the µP can generate any tone within the 100–3000 Hz audio band. This is
accomplished by the µP generating a square wave which enters the ASFIC CMP at U504 pin 19.
Inside the ASFIC CMP this signal is routed to the alert tone generator.
The output of the generator is summed into the audio chain just after the RX audio de-emphasis
block. Inside U504, the tone is amplified and filtered, then passed through the 8-bit digital volume
attenuator, which is typically loaded with a special value for alert tone audio. The tone exits at
U504-pin 41 and is routed to the audio PA like receive audio.
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