Motorola MVME177, Инструкция по установке и эксплуатации

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Operating Instructions
3-4
3
Memory Maps
There are two possible perspectives or points of view for memory
maps:
❏
The mapping of all resources as viewed by local bus masters
(local bus memory map)
❏
The mapping of onboard resources as viewed by VMEbus
Masters (VMEbus memory map)
Local Bus Memory Map
The local bus memory map is split into different address spaces by
the transfer type (TT) signals. The local resources respond to the
normal access and interrupt acknowledge codes.
There is some address translation capability in the VMEchip2. This
allows multiple MVME177s on the same VMEbus with different
virtual local bus maps as viewed by different VMEbus masters.
Normal Address Range
The memory map of devices that respond to the normal address
range is shown in the following tables. The normal address range is
defined by the Transfer Type (TT) signals on the local bus. On the
MVME177, Transfer Types 0, 1, and 2 define the normal address
range.
Table 3-1. Local Bus Memory Map , is the entire map from $00000000
to $FFFFFFFF. Many areas of the map are user-programmable, and
suggested uses are shown in the table. The cache inhibit function is
programmable in the MMUs. The onboard I/O space must be
marked cache inhibit and serialized in its page table.
Table 3-2 on page 3-6 further defines the map for the local I/O
devices.