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Hardware Preparation and Installation
1
IP DMA Snoop Control (S5 Pins 1/2)
Segments 1 and 2 of switch S5 define the state of the snoop control bus
when an IP DMA controller is local bus master. As shown in
segment 1 controls Snoop Control signal 1 on the MC680x0 processor. S5
segment 2 controls Snoop Control signal 0. Setting a segment to
ON
produces a logical 0; setting it to
OFF
produces a logical 1.
S5 varies in function according to the type of processor installed. For
MVME162P2 boards with an MC68040 processor, setting segments 1 and
2 of switch S5 to
OFF
or leaving both segments set to
ON
(the factory
configuration) inhibits snooping. Enabling snooping requires one of two
possible
ON
/
OFF
combinations, according to the operation desired.
MVME172P2 boards with an MC68060 processor have different snoop
functionality.
The following table lists the snoop operations represented by the settings
of S5 with both types of processor. For further details, refer to the
MC68040 or MC68060 microprocessor user’s manuals listed in the
Related Documentation appendix.
Table 1-9. Switch S5 Snoop Control Encoding
S5-1
(SC1)
S5-2
(SC0)
Requested Snoop Operation
MC68040
MC68060
On
On
Snoop disabled
Snoop enabled
On
Off
Source dirty, sink byte/word/longword
Snoop disabled
Off
On
Source dirty, invalidate line
Snoop enabled
Off
Off
Snoop disabled (Reserved)
Snoop disabled
ON
OFF
4
1
S5
Snoop inhibited
(factory configuration)
2736 0004 (1-3)
Содержание MVME162P-242
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