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Chapter 10. I
2
C Interface
10-7
I
2
C Register Descriptions
10.2.8 Handshaking
The clock synchronization mechanism can be used as a handshake in data transfer. Slave
devices can hold the SCL low after completion of one byte transfer (9 bits). In such cases,
it halts the bus clock and forces the master clock into wait states until the slave releases the
SCL line.
10.2.9 Clock Stretching
Slaves can use the clock synchronization mechanism to slow down the transfer bit rate.
After the master has driven the SCL line low, the slave can drive SCL low for the required
period and then release it. If the slave SCL low period is greater than the master SCL low
period, then the resulting SCL bus signal low period is stretched.
10.3 I
2
C Register Descriptions
This section describes the I
2
C registers in detail.
NOTE:
Even though reserved fields return 0, this should not be
assumed by the programmer. Reserved bits should always be
written with the value they returned when read. In other words,
the register should be programmed by reading the value,
modifying the appropriate fields, and writing back the value.
This does not apply to the I
2
C data register (I2CDR).
The I
2
C registers in this chapter are shown in little-endian format. If the system is
big-endian, software must swap the bytes appropriately.
10.3.1 I
2
C Address Register (I2CADR)
The I2CADR, shown in Figure 10-3, contains the address that the I
2
C interface responds to
when addressed as a slave. Note that it is not the address sent on the bus during the address
calling cycle when the MPC8240 is in master mode.
Figure 10-3. I
2
C Address Register (I2CADR)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADDR
0
31
8
7
1
0
Reserved
Содержание MPC8240
Страница 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Страница 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Страница 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Страница 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Страница 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Страница 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Страница 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Страница 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Страница 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Страница 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Страница 516: ...16 14 Watchpoint Trigger Applications ...
Страница 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Страница 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Страница 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...