MOTOROLA
Chapter 3. Receiver
3-13
Receiver Interface Timing Modes
the transmitter is sending data at a rate faster than the receiver, then a shortened cycle is
generated as needed to track the incoming data rate. Alternately, if the transmitter is running
slower than the receiver, then a long cycle is generated. The recovered clock duty cycle may
be reduced or increased by 200 ps (if nominal frequency is 125 MHz) in order to match the
transmitter frequency. For example, if the reference clock frequency is 125 MHz, this
means that the minimum recovered clock cycle time is 7.8 ns and the maximum recovered
clock cycle is 8.2 ns.
NOTE
Devices that interface to a MC92603 and are run in a recovered
clock mode, must be able to tolerate this modulated clock.
When operating in the recovered clock timing mode, the addition or deletion of IDLEs is
inappropriate. If RCCE is asserted (recovered clock timing mode), the add/delete IDLE
enable, ADIE, signal must be low.
3.6.2
Reference Clock Timing Mode (RCCE = Low)
Data is timed relative to the local reference clock when RCCE is low. Synchronization
between the recovered clock and the reference clock is handled by the receiver interface.
Frequency offset between the transmitter’s reference clock and the receiver’s reference
clock causes overrun/underrun situations. Overrun occurs when the link partner’s
transmitter is running faster than the receiver. Underrun occurs when the transmitter is
running slower than the receiver. To avoid overrun/underrun conditions, rate adaption
performed whereby, data is dropped or repeated to allow the data to be presented at the
interface at the local reference clock frequency. Table 3-7 summarizes the rate adaption
technique as a function of the receiver configuration when the receiver reference clock is
slower than the transmitter reference clock. Table 3-8 summarizes the rate adaption
technique as a function of the receiver configuration when the receiver reference clock is
faster than the transmitter reference clock.
The ability to drop/repeat data is controlled by the ADIE configuration input. For instance,
if ADIE is high and COMPAT is low, pairs of IDLE bytes (K28.5) will be dropped/repeated.
If an overrun situation is imminent (transmitter is faster than the receiver), then the receiver
interface searches for a pair of IDLE bytes to drop. Two consecutive IDLE bytes are
dropped to assure that running disparity is not affected. If sufficient IDLE patterns are not
available to drop, the receiver overrun may occur. When an overrun occurs, the ‘overrun’
error is reported as described in Table 3-12, Table 3-15, or Table 3-16 for a 1-byte clock
period and 2 code groups of data are dropped. A sufficient number of IDLEs must be
transmitted to guard against an overrun.
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