Motorola M68MPB334, Руководство пользователя

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MEVB SUPPORT INFORMATION
4-8 M68MPB334UM/D
Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued)
Pin Mnemonic Signal
16 A19 /
CS6
ADDRESS BUS BIT 19 – One bit of the 24-bit address
bus.
CHIP SELECT 6 – Output signal that selects peripheral
or memory devices at programmed addresses.
17 – 19 A18 – A16 ADDRESS BUS 18 – 16 – Three bits of the 24-bit
address bus.
20 GND GROUND
Table 4-8. Logic Analyzer Connector J14 Pin Assignments
Pin Mnemonic Signal
1, 2 SPARE No connection
3 DSACK0 DATA AND SIZE ACKNOWLEDGE 0 – Active-low
input signal that allows asynchronous data transfers
and dynamic bus sizing between the MCU and external
devices.
4 MODCLK CLOCK MODE SELECT – Input signal that configures
the MCU internal clock at reset.
5 TSC THREE STATE CONTROL – When TSC is logic high,
this input signal forces all output drivers to a high-
impedance state.
6 RESET RESET – Active-low, bi-directional signal to start a
system reset.
7 RMC READ-MODIFY-WRITE CYCLE – Active-low output
signal that identifies the bus cycle as part of an
indivisible read-modify-write operation.
8 SPARE No connection
9 – 15 GND GROUND
16 – 19 SPARE No connection
20 GND GROUND