Motorola LA-51XX, Руководство программиста драйвера

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2-2 LA-51XX Compact Flash Adapter Driver Programmer’s Guide
The B-bit is the most significant bit of the 32-bit (little endian) MAX_WAIT field. When set, B-bit tells the
driver to issue a RAM-Boot after the corresponding block has been uploaded. A RAM-boot causes the ARM
to reset and start executing code from the start of SRAM. The SIZE field specifies how many bytes of (white)
payload follow the WRM block header.
The (white) blocks of data are disposed of by the Upload Helper (UH) binary on the device. The driver and the
UH use a PCI interrupt as handshake signal to tell each other that they are ready for the next block. The driver
shall wait for at least MAX_WAIT microseconds for UH’s sign of readiness before it may conclude that the
upload failed for some reason.
2.1.2 Upload Helper Function
The UH forms the content of the first WRM block, and the Boot flag tells the driver to RAM-boot after the
block is uploaded. This effectively boots the UH, which installs itself at address 0 (ITCM) and starts
communicating with the driver through the software-defined READY interrupt (mask 0x2000) as the
handshake signal. UH implements a simple loop through the following steps:
1. Wait for a READY interrupt from the host/driver.
2. Clear the host’s READY interrupt.
3. If no-copy (NC) bit is not set, it copies Size bytes of binary data to its destination specified by Destination .
4. Set the READY interrupt to the host/driver.
5. If no-jump (NJ) bit is not set, it jumps to the Jump address.
The UH then waits for the driver to upload the next block, copies it to its destination and signals its
readiness.