Motorola GM338, Руководство по обслуживанию

Страница: 389 / 556

Transmitter Power Amplifier (PA) 45 W 2-5
3.6 Antenna Switch
The antenna switch consists of two PIN diodes, D3471 and D3472. In the receive mode, both diodes
are off. Signals applied at the antenna jack J3401 are routed, via the harmonic filter, through
network L3472, C3474 and C3475, to the receiver input. In the transmit mode, the keyed 9 volts
turns on Q3471 which enables current sink Q3472, set to 96 mA by R3473 and VR3471. This
completes a dc path from PASUPVLTG, through L3473, D3471, L3477, L3472, D3472, L3471,
R3474 and the current sink, to ground. Both diodes are forward biased into conduction. The
transmitter RF from the directional coupler is routed via D3471 to the harmonic filter and antenna
jack. D3472 also conducts, shunting RF power and preventing it from reaching the receiver port
(RXIN). L3472 is selected to appear as a broadband guarter-wave transmission line, making the
short circuit presented by D3472 appear as an open circuit at the junction of D3472 and the receiver
path.
3.7 Harmonic Filter
Components L3491-L3494 and C3490-C3498 form a nine-pole Chebychev low-pass filter to
attenuate harmonic energy of the transmitter. R3490 is used to drain electrostatic charge that might
otherwise build up on the antenna. The harmonic filter also prevents high level RF signals above the
receiver passband from reaching the receiver circuits, improving spurious response rejection.
3.8 Power Control
The transmitter uses the power control IC (PCIC, U3501) to control the power output of the radio. A
portion of the forward and reflected RF power from the transmitter is sampled by the directional
coupler, rectified and summed, to provide a dc voltage to the RFIN port of the PCIC (pin 1) which is
proportional to the sampled RF power.
The ASFIC contains a digital to analog converter (DAC) which provides a reference voltage of the
control loop to the PCIC via R3517. The reference voltage level is programmable through the SPI
line of the PCIC. This reference voltage is proportional to the desired power setting of the transmitter,
and is factory programmed at several points across the frequency range of the transmitter to offset
frequency response variations of the transmitter’s power detector circuit.
The PCIC provides a dc output voltage at pin 4 (INT) which is amplified and shifted in dc level by
stages Q3501 and Q3502. The 0 to 4 Vdc range at U1503, pin 4 is translated to a 0 to 8.5 Vdc range
at the output of Q3501, and applied as VCONT to the power-adjust input pin of the first transmitter
stage U3401. This adjusts the transmitter power output to the intended value. Variations in forward
or reflected transmitter power cause the dc voltage at pin 1 to change, and the PCIC adjusts the
control voltage above or below its nominal value to raise or lower output power.
Capacitors C3502-4, in conjunction with resistors and integrators within the PCIC, control the
transmitter power-rise (key-up) and power-decay (de-key) characteristic to minimize splatter into
adjacent channels.
U3502 is a temperature-sensing device, which monitors the circuit board temperature in the vicinity
of the transmitter driver and final devices, and provides a dc voltage to the PCIC (TEMP, pin 29)
proportional to temperature. If the dc voltage produced exceeds the set threshold in the PCIC, the
transmitter output power is reduced so as to reduce the transmitter temperature.