Chapter 16. UART Modules
16-5
Register Descriptions
16.3.1 UART Mode Registers 1 (UMR1n)
The UART mode registers 1 (UMR1n) control configuration. UMR1n can be read or
written when the mode register pointer points to it, at RESET or after a
RESET
MODE
REGISTER
POINTER
command using UCRn[MISC]. After UMR1n is read or written, the
pointer points to UMR2n.
Table 16-2 describes UMR1n fields.
7
6
5
4
3
2
1
0
Field
RxRTS
RxIRQ/FFULL
ERR
PM
PT
B/C
Reset
0000_0000
R/W
R/W
Address
MBAR + 0x100 (UART0), 0x140 (UART1). After UMR1n is read or written, the pointer points to UMR2n.
Figure 16-2. UART Mode Registers 1 (UMR1n)
Table 16-2. UMR1n Field Descriptions
Bits
Name
Description
7
RxRTS
Receiver request-to-send. Allows the RTS output to control the CTS input of the transmitting device
to prevent receiver overrun. If both the receiver and transmitter are incorrectly programmed for RTS
control, RTS control is disabled for both. Transmitter RTS control is configured in UMR2n[TxRTS].
0 The receiver has no effect on RTS.
1 When a valid start bit is received, RTS is negated if the UART's FIFO is full. RTS is reasserted
when the FIFO has an empty position available.
If RTS is controlled by the fill level of the receiver FIFO via UACRn[RTSL], this bit should be cleared.
6
RxIRQ/
FFULL
Receiver interrupt select.
0 RxRDY is the source that generates IRQ.
1 FFULL is the source that generates IRQ.
If more detail on the status of the FIFO is required, UISRn{RxFIFO] indicates a change in the FIFO
status as programmed in URFn[RXS].
5
ERR
Error mode. Configures the FIFO status bits, USRn[RB,FE,PE].
0 Character mode. The USRn values reflect the status of the character at the top of the FIFO. ERR
must be 0 for correct A/D flag information when in multidrop mode.
1 Block mode. The USRn values are the logical OR of the status for all characters reaching the top of
the FIFO because the last
RESET
ERROR
STATUS
command for the channel was issued. See
Section 16.3.5, “UART Command Registers (UCRn).”
4–3
PM
Parity mode. Selects the parity or multidrop mode for the channel. The parity bit is added to the
transmitted character, and the receiver performs a parity check on incoming data. The value of PM
affects PT, as shown below.
Содержание DigitalDNA ColdFire MCF5272
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Страница 548: ...INDEX Index 12 MCF5272 User s Manual ...