2-4
THEORY OF OPERATION
3.6
Harmonic Filter
Inductors L111 and L113 along with capacitors C1011, C1023, C1020 and C1016 form a low-pass
filter to attenuate harmonic energy coming from the transmitter. Resistor R150 along with L126
drains any electrostatic charges that might otherwise build up on the antenna. The harmonic filter
also prevents high level RF signals above the receiver passband from reaching the receiver circuits
to improve spurious response rejection.
3.7
Power Control
The output power is regulated by using a forward power detection control loop. A directional coupler
samples a portion of the forward and reflected RF power. The forward sampled RF is rectified by
diode D105, and the resulting DC voltage is routed to the operational amplifier U100. The error
output current is then routed to an integrator, and converted into the control voltage. This voltage
controls the bias of the pre-driver (U101 and driver (Q105) stages. The output power level is set by
way of a DAC, PWR_SET, in the audio processing IC (U504) which acts at the forward power
control loop reference.
The sampled reflected power is rectified by diode D107,The resulting DC voltage is amplified by an
operational amplifier U100 and routed to the summing junction. This detector protects the final stage
Q100 from reflected power by increasing the error current. The temperature sensor protects the
final stage Q100 from overheating by increasing the error current. A thermistor RT100 measures the
final stage Q100 temperature. The voltage divider output is routed to an operational amplifier U103
and then goes to the summing junction. The Zener Diode VR101 keeps the loop control voltage
below 5.6 V and eliminates the DC current from the 9.3 regulator U501.
Two local loops for the Pre Driver (U101) and for the Driver (Q105) are used in order to stabilize the
current for each stage.
In Rx mode, the two transistors Q101 and Q102 go to saturation and shut down the transmitter by
applying ground to the Pre Driver U101 and for the Driver Q105 control.
4.0
UHF (438-470 MHz) Frequency Synthesis
The synthesizer consists of a reference oscillator (Y201), low voltage Fractional-N (LVFRAC-N)
synthesizer (U200), and a voltage controlled oscillator (VCO) (U201).
4.1
Reference Oscillator
The reference oscillator is a crystal (Y201) controlled Colpitts oscillator and has a frequency of
16.8 MHz. The oscillator transistor and start-up circuit are located in the LVFRAC-N (U200) while
the oscillator feedback capacitors, crystal, and tuning varactors are external. An analog-to-digital (A/
D) converter internal to the LVFRAC-N (U200) and controlled by the microprocessor via SPI sets the
voltage at the warp output of U200 pin 25. This sets the frequency of the oscillator. Consequently,
the output of the crystal Y201 is applied to U200 pin 23.
The method of temperature compensation is to apply an inverse Bechmann voltage curve, which
matches the crystal’s Bechmann curve to a varactor that constantly shifts the oscillator back on
frequency. The crystal vendor characterizes the crystal over a specified temperature range and
codes this information into a bar code that is printed on the crystal package. In production, this
crystal code is read via a 2-dimensional bar code reader and the parameters are saved.
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