TEST SET-UP PROCEDURES
1.
Verify ±15 VDC at Pins 6 & 8.
All voltage measurements are
with respect to Pin-7 or TP7 (PC
Board Analog Common).
2.
Verify Factory Setting: As
shipped, frequency varies 100Hz
to 2Khz. Frequency varies with
C3, C4 & R3.
3.
Remove C3 to vary frequency
range from 500Hz to 10Khz.
4.
Ensure proper exciter frequency
is selected & configured on card.
5.
Connect Ch1 of Scope to TP3 &
monitor voltage waveform.
6.
Adjust potentiometer R6 & R7
for Sinewave at TP3.Verify
Waveform Symmetry as
required. Note: Pots are factory
set & should only be adjusted if
waveform symmetry is not
observed.
7.
Adjust OSCILLATOR
FREQUENCY pot (R3) for
desired exciter frequency.
8.
Adjust AMPLITUDE pot (R20)
for approximately 3 to 4 Vp-p at
TP3. Ensure saturation is not
occurring as indicated by upper
& lower flat waveform sections.
9.
Connect Ch1 of Scope to Test
Point “Vin” and Ch2 to Test Point
“Sample”
10. Adjust DEMODULATOR PHASE
pot (R11) until Sample Pulse
occurs at Sinewave ‘peak’ (LVDT
offset from Zero). Refer to
attached waveform diagrams.
II.
The sample pulse will be a very
‘narrow’ pulse as indicated on
waveform plotted from
oscilloscope results.
12. The DEMODULATOR PHASE
pot (R11) adjusts timing of
trigger pulse for peak sampling of
signal to be demodulated. By
adjusting R11, the ‘sample’ pulse
can be adjusted more than 150°
of Ch1 waveform (ex.
≈
40% of
the waveform).
13. Referring to attached diagrams,
Figure A indicates sample pulse
alignment required with LVDT ac
waveform output for the
‘positive’ core position.
14. Figure B Indicates sample pulse
alignment required with LVDT ac
waveform output for the
‘negative’ core position. Figure C
Indicates sample pulse alignment
at the LVDT null or zero
position.
15. Connect Scope to Output Test
Point TP12.
16. Adjust DEMODULATOR SPAN
pot (R34) and DEMODULATOR
ZERO pot (R43) to obtain
proper scaling at TP12 while
moving LVDT over linear range.
Ensure Demodulator Span
output (U4B) does not enter
saturation.
17. Span & Zero interaction is
normal. Multiple iterations may
be required.
Continue to repeat steps until
both are within specification
without further adjustment.
18. Note:
Operating points on ends of
LVDT coils will become
increasingly non-linear and
should be avoided. An operating
range over the ±Span of the
LVDT core adjustment must be
made to achieve linear
performance results.
333 Acqs
Tek Stop: 2.50MS/s
Ch 1 Freq
7.825 kHz
Low signal
amplitude
Ch1 Pk-Pk
1.6V
2
Ch1
5.00V
Ch2
5.00V
M20.0
µ
s
Ch1
∫
500mV
Figure C
Hi Res
Tek Run: 2.50MS/s
Ch 1 Freq
7.769 kHz
Ch1 Pk-Pk
13.1V
2
Ch1
5.00V
Ch2
5.00V
M20.0
µ
s
Ch1
∫
500mV
Figure B
Hi Res
Tek Run: 2.50MS/s
Ch 1 Freq
7.765 kHz
Ch1 Pk-Pk
15.7V
2
Ch1
5.00V
Ch2
5.00V
M20.0
µ
s
Ch1
∫
-2.3V
Figure A
