molex BittWare ACC-JTAG-BR, Справочник по аппаратуре

Страница: 12 / 17

ACC-JTAG-BR Hardware Reference Guide
Rev 1.0 www.bittware.com 12
BittWare Proprietary - Do Not Distribute Without Permission from BittWare
2.2 JTAG Chain
On the 250-SoC, the only device in the JTAG chain is the Xilinx Zynq MPSoC. Within the MPSoC a
user can access the PS, the PL and the QSPI flash memory.
Only the MPSoC device exists in the JTAG chain. The currently supported device is given in Table 2.
Device Speed Grade Package Part Number
XCZU19EG 2 FFVD1760 XCZU19EG-2FFVD1760E
Table 2: JTAG Chain Devices
2.3 Other Features
Some of the LEDs and pins of P5 header connect to the 250-SoC card to perform special functions.
Breakout
P5 Pin
Breakout
LED
Breakout
Signal Name
250-SoC
Signal Name
Description 250-SoC J5 Pin
10 D4 LED2 FPGA_I2C_SCL
I2C clock to
MPSoC & I2C
devices
15
9 D5 LED3 FPGA_I2C_SDA
I2C data to
MPSoC & I2C
devices
16
7 D7 LED5 PB_RST_N
Push Button
Reset to
UCD9090
18
Table 3: Push Button and UCD I2C Bus Signals on Breakout Board
Figure 2: P5 Breakout Board User Signals
When using either the I2C or PB_RST_N, the user will also need to connect to one of the available
grounds on P5 (pins 3, 7, 11, 19, 4, 8, or 20).
2.3.1 I2C Bus
The I2C bus (FPGA_I2C_SDA & FPGA_I2C_SCL) signals are pulled up on the card and give access
to the FPGA I2C bus
– See 250-SoC Hardware Reference Guide for details of the devices accessible
on this I2C bus.
2.3.2 PS Reset Push Button
The PB_RST_N is pulled up on the 250-SoC. Users could connect a push button to this signal to
ground the signal with pressed. The 250-SoC card includes a circuit which debounces this input and
creates a pulse on PS_SRST_B to reset the ARM without having to power cycle the card.
LED3 / FPGA_I2C_SDA
LED2 / FPGA_I2C_SCL
LED5 / PB_RST_N