APPENDICES
Appendix 2 Special Register List
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Appendix 2 Special Register List
The special registers, SD, are internal registers with fixed applications in the
Programmable Controller.
For this reason, it is not possible to use these registers in sequence programs in the same
way that normal registers are used.
However, data can be written as needed in order to control the CPU modules and remote
I/O modules.
Data stored in the special registers are stored as BIN values if no special designation has
been made to the contrary.
The heading descriptions in the following special register lists are shown in TableApp.18.
For details on the following items, refer to the following manuals:
• Networks
Manual of the corresponding network module
• SFC
QCPU(Q mode)/QnACPU Programming Manual (SFC)
POINT
(1) SD1200 to SD1255 are used for the QnACPU.
These relays are empty for the QCPU.
TableApp.18 Descriptions of the special register lists headings
Item
Function of Item
Number
• Indicates special register number
Name
• Indicates name of special register
Meaning
• Indicates contents of special register
Explanation
• Discusses contents of special register in more detail
Set by
(When set)
• Indicates whether the relay is set by the system or user, and, if it is set by the system, when setting is performed.
<Set by>
S
: Set by system
U
: Set by user (sequence programs or test operations from GX Developer)
S/U
: Set by both system and user
<When set>
Indicated only for registers set by system
Each END
: Set during each END processing
Initial
: Set only during initial processing (when power supply is turned ON, or when going from STOP to RUN)
Status change
: Set only when there is a change in status
Error
: Set when error occurs
Instruction execution
: Set when instruction is executed
Request
: Set only when there is a user request (through SM, etc.)
System switching
: Set when system switching is executed.
Corresponding ACPU
M9
• Indicates corresponding special register in ACPU
(When the contents are changed, the special register is represented D9
format change. Incompatible with the Q00J/Q00/Q01
and QnPRH.)
• New indicates the special register newly added to the QnACPU or Q series CPU module.
Corresponding CPU
Indicates the relevant CPU module.
: Indicates all the QnACPU and QCPU.
QCPU
: Indicates all the Q series CPU modules.
Q00J/Q00/Q01
: Indicates the Basic model QCPU.
Qn(H)
: Indicates the High Performance model QCPU.
QnPH
: Indicates the Process CPU.
QnPRH
: Indicates the Redundant CPU.
QnU
: Indicates the Universal model QCPU
QnA
: Can be applied to QnA series and Q2ASCPU series
Rem
: Can be applied to the MELSECNET/H remote I/O modules.
Each CPU type name
: Can be applied only to the specific CPU. (e.g. Q4AR, Q3A)
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