81
2
3
4
5
6
7
8
2.8
M
u
ltiple
CPU high-speed tr
ans
mission ded
icated instr
uction
2.8.1
In
str
uctions for Mu
ltiple
CPU high-speed tr
ansmission
2.8
Multiple CPU high-speed transmission dedicated instruction
2.8.1
Instructions for Multiple CPU high-speed transmission
2.9
Redundant system instructions (For Redundant CPU)
2.9.1
Instructions for Redundant system (For Redundant CPU)
Category
Instru
ctio
n Sym
bol
Symbol
Processing Details
Execution
Condition
Num
b
er o
f Basic
S
tep
s
Sub
set
See f
o
r Descrip
tio
n
Writing
Devices to
Another
CPU
D.DDWR
In multiple CPU system, data stored in a
device specified by host CPU (
) or later is
stored by the number of write points specified
by (
+1) into a device specified by another
CPU (n) (
) or later
10
-
DP.DDWR
10
-
Reading
Devices
from
Another
CPU
D.DDRD
In multiple CPU system, data stored in a
device specified by another CPU (n) (
) or
lrater is stored by the number of read points
specified by (
+1) into a device specified by
host CPU (
) or late
10
-
DP.DDRD
10
-
Category
Inst
ruct
ion S
y
mbo
l
Symbol
Processing Details
Execution
Condition
Nu
mb
er
o
f B
asic S
tep
s
Su
bset
See
for De
scriptio
n
System
switching
SP.CONT
SW
Switches between the control system and
standby system at the END processing of the
scan executed with the SP.CONTSW
instruction.
8
-
D2
D1
S2
S1
D.DDWR
n
S2
D2
D1
D2
D1
S2
S1
DP.DDWR
n
D2
D1
S2
S1
D.DDRD
n
D1
S1
S2
D2
D1
S2
S1
DP.DDRD
n
SP.CONTSW
S D