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3.5 Interface with External Devices
3
SPECIFICATIONS
3.5
Interface with External Devices
The following table shows the list of external device interface for the QD63P6.
Table 3.8 External device interface list for the QD63P6
I/O
classification
Internal circuit
Terminal
number
Signal name
Operation
Input voltage
(guaranteed
value)
Operating
current
(guaranteed
value)
Input
Refer to
Phase A pulse input +
ON
4.5 to 5.5 V
6.4 to 11.5 mA
Phase A pulse input -
OFF
2 V or less
0.1 mA or less
Phase B pulse input +
ON
4.5 to 5.5 V
6.4 to 11.5 mA
Phase B pulse input -
OFF
2 V or less
0.1 mA or less
Table 3.9 Terminal layoutof each channel
Signal name
Terminal
number
Signal name
Reserved
B20
A20
Reserved
CH1 Phase A pulse input -
B19
A19
CH1 Phase A pulse input +
CH1 Phase B pulse input -
B18
A18
CH1 Phase B pulse input +
Reserved
B17
A17
Reserved
CH2 Phase A pulse input -
B16
A16
CH2 Phase A pulse input +
CH2 Phase B pulse input -
B15
A15
CH2 Phase B pulse input +
Reserved
B14
A14
Reserved
CH3 Phase A pulse input -
B13
A13
CH3 Phase A pulse input +
CH3 Phase B pulse input -
B12
A12
CH3 Phase B pulse input +
Reserved
B11
A11
Reserved
CH4 Phase A pulse input -
B10
A10
CH4 Phase A pulse input +
CH4 Phase B pulse input -
B09
A09
CH4 Phase B pulse input +
Reserved
B08
A08
Reserved
CH5 Phase A pulse input -
B07
A07
CH5 Phase A pulse input +
CH5 Phase B pulse input -
B06
A06
CH5Phase B pulse input +
Reserved
B05
A05
Reserved
CH6 Phase A pulse input -
B04
A04
CH6 Phase A pulse input +
CH6 Phase B pulse input -
B03
A03
CH6 Phase B pulse input +
Reserved
B02
A02
Reserved
Reserved
B01
A01
Reserved
240 1/8 W
240 1/8 W