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MP N/B Maintenance
MP N/B Maintenance
1.3.9 Memory System
256MB, 512MB, 1GB (x64) 200-Pin DDR2 SDRAM SODIMMs
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JEDEC-standard 200-pin, small-outline, dual in-line memory module (SODIMM)
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VDD=+1.8V±0.1V, VDDQ=+1.8V±0.1V
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JEDEC standard 1.8V I/O (SSTL_18-compatible)
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Differential data strobe (DQS,DQS#) option
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Four-bit prefetch architecture
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Differential clock input (CK,CK#)
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Hardware protection:
---Optional 16K byte or 64K byte Top Boot Block with lockout protection
---#TBL & #WP support the whole chip hardware protection
---Flexible 4K page size can be used as Parameter Blocks
---Low power consumption. Active current: 40mA (typ. For FWH mode)
---Automatic program and erase timing with internal Vpp generation
---End of program or erase detection: Toggle bit; Data polling
---Latched address and data
MiTac Secret
Confidential Document