mikroElektronika mikroETH 100, Руководство пользователя

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MikroElektronika
Figure 2 : mikroETH 100 additional board connection schematic
PSP MODE
#Pins
Data
Width
Address/Data
Multiplexing
Control lines Theoretical
Performance @
10MHz (Mbits/s)
min max
1 19 26 8 bit No CS, RD, WR 80
2 19 26 8 bit No CS, EN, R/W 80
3 26 34 16 bit No CS, RD, WRL, WRH 160
4 26 34 16 bit No CS, R/W, B0SEL, B1SEL 160
5 12 19 8 bit Yes AL, CS, RD, WR <80
6 12 19 8 bit Yes AL, CS, EN, R/W <80
9 19 21 16 bit Yes AL, CS, RD, WRL, WRH <80
10 19 21 16 bit Yes AL, CS, R/W, B0SEL,
B1SEL
<80
Table 2