P A G E 6
CLICKER 4 for TMPM4K
U S E R M A N U A L
1. Key microcontroller features
Memory
Communiction
Analog
Motor Control
CRC Calculation
Exception
RAMP
(2ch)
Cortex-M4
processor with FPU
Debug
NBDIF
NVIC
PLL
LVD
UART
(3 to 4ch)
I2C/EI2C
(1 to 2ch)
TSPI
(1 to 2ch)
ADC
(6 to 11ch)
ADC
(2 to 5ch)
ADC
(0 to 6ch)
A-ENC32
(0 to 1,3ch)
A-PMD
(1, 3ch)
A-VE+
(1ch)
OPAMP
(3 unit)
OFD
T32A(6ch)
SIWDT(1ch)
IHOSC1
IHOSC2
EHOSC2
TRM
CRC
INT(IA)
INT(IB)
DMAC
TRGSEL
DNF
PORT
(31 to 87 pin)
System
Timer
Clock Control
RAM
(24 KB)
With Parity
BOOT
ROM
(6KB)
Code FLASH
(128 to 256 KB)
TMPM4KNFYAFG
is the 32-bit ARM® Cortex®-M4 core. This
MCU is produced by Toshiba, featuring a dedicated floating-
point unit (FPU), memory protection unit (MPU), and
advanced features ideal for motors and industrial equipment
applications. Among many peripherals available on the host
MCU, key features include:
∫ 256kB Code Flash
∫ 32kB Data Flash
∫ 24kB of SRAM
∫ Operating frequency up to 160 MHz
∫ Advanced programmable motor control circuit (A-PMD)
∫ Advanced vector engine plus (A-VE+)
∫ Advanced Encoder input circuit (32-bit) (A-ENC32)
For the complete list of MCU features, please refer to the
TMPM4KNFYAFG
Figure 2: TMPM4KNF
YAF
G MCU block schematic
At its core, Clicker 4 for TMPM4K uses the
TMPM4KNFYAFG
MCU.
MCU FEA
TURES