Microchip Technology EVB-LAN9252-PICtail, Руководство пользователя

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EVB-LAN9252-PICtail™ Add-On Board User’s Guide
DS50002427A-page 18
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2015 Microchip Technology Inc.
3.2.1 IRQ Selection
Based on the PIMs on the Explorer 16 Development Board [MA320003 (PIC32MX-
795F512L), MA240011 (PIC24FJ128GA010) or with MA320012 (PIC32MZxxxx-
ECx100)] the following configuration in
Table 3-2 has to be done in J3 for Interrupt
Request (IRQ) signal.
3.2.2 HBI Mode
The Host Bus Interface (HBI) module provides a high-speed asynchronous slave inter-
face that facilitates communication between LAN9252 and the host system. The HBI
allows access to the System CSRs and the internal FIFOs and memories, and also
handles byte swapping based on the endianness select.
To select HBI Mode, configuration should be done based on
Table 3-3 . However, to fur-
ther configure in indexed or multiplexed mode, refer to the subsections below.
3.2.2.1 HBI MULTIPLEXED MODE CONFIGURATION
In Multiplexed Address/Data mode, the address, FIFO Direct Select and endianness
select inputs are shared with the data bus.
To operate in the HBI Multiplexed mode, the following switch configurations in
Table 3-4
must be enabled.
Along with the switch configuration the following jumper configuration in Table 3-5 must
be enabled.
3.2.2.2 HBI INDEXED MODE
In Indexed Address mode, access to the internal registers and memory of the device
are indirectly mapped using Index and Data registers.
TABLE 3-2: IRQ SELECTION
Short Pins (J3) Plug-In Board with Explorer 16 Development Board
2-3 MA320003 (PIC32MX795F512L)
MA240011 (PIC24FJ128GA010)
1-2 MA320012 (PIC32MZxxxxECx100)
TABLE 3-3: HBI MODE SWITCH CONFIGURATION
Switch Short Pins
SW2 (D9 and D5) 1-2 & 4-5
SW3 (D0 and D1) 1-2 & 4-5
SW4 (D2 and D3) 1-2 & 4-5
TABLE 3-4: HBI MULTIPLEXED MODE SWITCH CONFIGURATION
Switch Short Pins
SW9 (ALELO) 2-3 & 5-6
SW5 (ALEHI) 2-3 & 5-6
TABLE 3-5: HBI MULTIPLEXED MODE JUMPER CONFIGURATION
Jumper Short Pins
J2 (D15) 2-3