Microchip Technology DS61160A, Руководство пользователя

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Multimedia Expansion Board User’s Guide
DS61160A-page 34
©
2010 Microchip Technology Inc.
2.12 CPLD
A CPLD is provided to configure the graphics controller bus interface, SPI channel and
Chip Selects used for SPI Flash, the MRF24WBOMA, and the expansion slot, as
shown in Figure 2-28. The general I/O inputs are used to change the configuration,
which can be done at run time. Table 2-6 provides information on the Graphics Bus
Width CPLD configuration. Table 2-7 and Table 2-8 provide information on the SPI
channels that are configured by the CPLD. Table 2-9 provides information on the
default CPLD configuration combinations for PIC32MX Starter Kits.
FIGURE 2-28: CPLD
FIGURE 2-29: CPLD SLOT CONNECTION SCHEMATIC
SDI1A
RG12
ZG_CS FL_CS
SDO
1
A
ZG_SCK
SDI
3
A
SDO
3
A
SS1
A/
RD1
4
SCK
2
/S
CK
2A
SCK
1
A
SDO2
/S
DO
2A
SS2/SS
2
A/RG9
SS1/RB2
RA9
RD1
FL_SDO
ZG_UARTTX
WIFI_CS
FL_SDI
RA7
RA6
ZG_UARTRX
WIFI_SDO
INT3/RA14
WIFI_SDI
RG14
SS3
A/RF1
2
ZG_SDI
ZG_SD
O
SDI2/SDI2A/CN9/
R
G
7
SCK
3
A
RD2
INT1/RE8
WIFI_SCK
FL_SCK
CNF2
RD0 CNF0/1
CODEC_DACLRC
SS1/RD9