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KSZ8873MLL/FLL/RLL Evaluation Board User’s Guide 

 

Micrel, Inc. 

 

January 11, 2011 

Confidential 

 

Rev. 1.1 

6/10

 

 

4.1.1 

Feature Setting Jumpers 

 
The  evaluation  board  provides  jumpers  to  allow  easy  setting  of  strap  in  configurations  for  the 
KSZ8873MLL/FLL/RLL.  Table 1 describes the jumpers and their functionalities. 
 

Table 1:  Feature Setting Jumpers 

JUMPER 

KSZ8873MLL/FLL/RLL 

SIGNAL 

OPEN 

CLOSED 

JP3 

SPIQ 

SPI 

EEPROM 

JP25 

P2LED0 

EEPROM/SPI Setting.  See Section 4.2 and 4.3 

JP21 

P2LED1 

EEPROM/SPI Setting.  See Section 4.2 and 4.3 

JP26 

SMRXDV3 

P3 MII Setting.  Pull Up: PHY mode, Pull Down: MAC 
mode 

JP78 

FXSD1 

Pins 1-2 closed  :  Disable FEF feature of FX. 
Pins 5-6 closed  :  Force port 1 TX mode 
For KSZ8873MLL/RLL, close 5-6 since this device 
doesn’t support FX mode. 
For KSZ8873FLL, open JP77 

JP77 

FXSD2 

Pins 1-2 closed  :  Disable FEF feature of FX. 
Pins 5-6 closed  :  Force port 1 TX mode 
For KSZ8873MLL/RLL, close 5-6 since this device 
doesn’t support FX mode. 
For KSZ8873FLL, open JP77 

JP2 

PWRDN 

Normal Operation 

KSZ8873MLL/FLL/RLL  
Chip Power Down 

JP101 
   

P1FFC 

 

Pull Down = Disable 

 

Pull Up(default) = Enable 

JP102 
   

P1DPX 

 

Pull Down = Half Duplex 

 

Pull Up(default) = Full Duplex 

JP103 
   

P1SPD 

 

Pull Down = 10BT 

 

Pull Up(default) = 100BT 

JP104 

P1ANEN 

 

Pull Down = Disable 

 

Pull Up(default) = Enable 

JP201 
   

SMRXD30(P2FFC) 

 

Pull Down = Disable 

 

Pull Up(default) = Enable 

JP202 
   

SMRXD31(P2DPX) 

 

Pull Down = Half Duplex 

 

Pull Up(default) = Full Duplex 

JP203 
   

SMRXD32(P2SPD) 

 

Pull Down = 10BT 

 

Pull Up(default) = 100BT 

JP204 
   

SMRXD33(P2ANEN) 

 

Pull Down = Disable 

 

Pull Up(default) = Enable 

JP301 
   

P1LED1(P3FFC) 

 

Pull Down = Disable 

 

Pull Up(default) = Enable 

JP302 
   

P1LED0(P3DPX) 

 

Pull Down(default) = Full Duplex 

 

Pull Up = Half Duplex 

JP303 
   

P3SPD 

 

Pull Down(default) = 100BT 

 

Pull Up = 10BT 

JP304 
   

SPIQ(XCLK) 

 

Pull Down = 50MHz 

 

Pull Up(default) = 25MHz 

 

Note:

  JP101, JP102, JP103, JP201, JP202, JP203 are only valid if Auto-Negotiation is disabled. 

Содержание KSZ8873FLL

Страница 1: ... by Micrel for its use Micrel reserves the right to change circuitry and specifications at any time without notification to the customer Micrel Products are not designed or authorized for use as components in life support appliances devices or systems where malfunction of a product can reasonably be expected to result in personal injury Life support devices or systems are devices or systems that a...

Страница 2: ...73MLL FLL RLL Evaluation Board User s Guide Micrel Inc January 11 2011 Confidential Rev 1 1 2 10 Revision History Revision Date Summary of Changes 1 0 06 30 09 Initial Release 1 1 01 11 11 Update description ...

Страница 3: ...3 SPI Slave Mode 8 4 4 10 100 Ethernet PHY Ports KSZ8873MLL RLL 9 4 5 100FX Fiber Port KSZ8873FLL 9 4 6 LED Indicators 9 4 7 MII Port Configuration KSZ8873MLL FLL 9 4 8 RMII Port Configuration KSZ8873RLL 10 5 0 Reference Documents 10 List of Tables Table 1 Feature Setting Jumpers 6 Table 2 Reserved Jumpers 7 Table 3 EEPROM Mode Settings 8 Table 4 SPI Slave Mode Settings 8 Table 5 LED Modes 9 Table...

Страница 4: ...on Magnetics KSZ8873MLL RLL Auto MDI MDI X on the PHY port 1 PHY Mode and 1 MAC Mode MII Connectors for the Switch RMII MII Interface 2 100Base FX fiber interface KSZ8873FLL 1 USB port to emulate an MIIM EEPROM SPI Interface On board EEPROM 2 LEDs per port to Indicate the Status and Activity of the RJ45 port 1 power jack for 5VDC Universal Power Supply 3 0 Evaluation Kit Contents The KSZ8873MLL FL...

Страница 5: ...om any 110 Volt AC wall or bench socket Before to start to use the evaluation board make sure the power connectors JP403 JP404 JP405 and JP31 are connected and close pin 1 2 of J14 4 1 Strap In Mode Strap in configuration mode is the quickest and easiest way to get started In this mode the KSZ8873MLL FLL RLL acts as a standalone 3 port switch Simply set the board s configuration jumpers to the des...

Страница 6: ...F feature of FX Pins 5 6 closed Force port 1 TX mode For KSZ8873MLL RLL close 5 6 since this device doesn t support FX mode For KSZ8873FLL open JP77 JP2 PWRDN Normal Operation KSZ8873MLL FLL RLL Chip Power Down JP101 P1FFC Pull Down Disable Pull Up default Enable JP102 P1DPX Pull Down Half Duplex Pull Up default Full Duplex JP103 P1SPD Pull Down 10BT Pull Up default 100BT JP104 P1ANEN Pull Down Di...

Страница 7: ...aster EEPROM Mode The evaluation board has an EEPROM to allow the user to explore more extensive capabilities of the KSZ8873MLL FLL RLL The user can conveniently program the EEPROM on board using the USB port from any computer with a WIN 2000 XP environment and the Micrel provided software This makes it easy for the user to evaluate features like broadcast storm protection and rate control To prep...

Страница 8: ...accessing all of the KSZ8873MLL FLL RLL features and registers The user can easily access the SPI interface using a computer connected to the evaluation board s USB port interface Micrel provides a Windows 2000 XP based program for the user to evaluate the KSZ8873MLL FLL RLL s full feature set In addition to all the registers available via EEPROM programming a host CPU connected to the KSZ8873MLL ...

Страница 9: ...ver and fiber cable The fiber signal threshold can be set by register 192 bit 6 Port1 and bit 7 Port2 If the bits are 1 the threshold will be set to 2 0V Otherwise it is 1 25V The resister R76 also need to be adjusted if the FXSD signal value from the fiber module doesn t meet the fiber signal threshold spec 4 6 LED Indicators There is one column of LED indicator for one column for port 2 The LED ...

Страница 10: ...873RLL or by the link partner When pin 1 2 of JP28 is closed the reference clock will be output from REFCLKO on KSZ8873RLL Register 198 bit 3 is used to select internal or external reference clock for the KSZ8873RLL RMII interface If pin 2 3 of JP28 is closed the REFCLKO disable Table 7 RMII Clock Setting 5 0 Reference Documents KSZ8873MLL FLL RLL Datasheet Rev 1 1 Contact Micrel for latest Datash...

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