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MAX9777/MAX9778

Stereo 3W Audio Power Amplifiers with

Headphone Drive and Input Mux

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13

Headphone Sense Input (HPS)

With headphone sense enabled, a voltage on HPS less
than 0.7 x V

DD

sets the device to speaker mode. A volt-

age greater than 0.9 x V

DD

disables the inverting

bridge amplifier (OUT_-), which mutes the speaker
amplifier and sets the device into headphone mode.

For automatic headphone detection, enable headphone
sense and connect HPS to the control pin of a 3-wire
headphone jack as shown in Figure 2. With no head-
phone present, the resistive voltage-divider created by
R1 and R2 sets the voltage on HPS to be less than 0.7 x
V

DD

, setting the device to speaker mode and the gain

setting defaults to GAINA (MAX9777). When a head-
phone plug is inserted into the jack, the control pin is dis-
connected from the tip contact, and HPS is pulled to V

DD

through R1, setting the device into headphone mode and
the gain-setting defaults to GAINB (MAX9777) (see the
Gain Select section). Place a resistor in series with the
control pin and HPS (R3) to prevent any audio signal from
coupling into HPS when the device is in speaker mode.

Shutdown

The  MAX9777/MAX9778 feature a 10µA, low-power
shutdown mode that reduces quiescent current con-
sumption and extends battery life. The drive amplifiers
and bias circuitry are disabled, the amplifier outputs
(OUT_) go high impedance, and BIAS is driven to
GND. Driving 

SHDN

low places the devices into shut-

down mode, disables the interface, and resets the I

2

C

registers to a default state. A logic-high on 

SHDN

enables the devices.

MAX9777 Software Shutdown

A logic-high on bit 0 of the SHDN register places the
MAX9777 in shutdown mode. A logic-low enables the

device. The digital section of the MAX9777 remains
active when the device is shut down through the inter-
face. All devices feature a logic-low on the 

SHDN

input.

MUTE

The  MAX9777/MAX9778 feature a mute mode. When
the device is muted, the input is disconnected from the
amplifiers. MUTE does not shut down the device.

MAX9777 MUTE

The MAX9777 MUTE mode is selected by writing to the
MUTE register (see the 

Mute Register section). The left

and right channels can be independently muted.

MAX9778 MUTE

The MAX9778 features an active-high MUTE input that
mutes all channels.

Click-and-Pop Suppression

The  MAX9777/MAX9778 feature Maxim’s comprehen-
sive click-and-pop suppression. When entering or exit-
ing shutdown, the common-mode bias voltage of the
amplifiers is slowly ramped to and from the DC bias
point using an S-shaped waveform. In headphone
mode, this waveform shapes the frequency spectrum,
minimizing the amount of audible components present
at the headphone. In speaker mode, the BTL amplifiers
start up in the same fashion as in headphone mode.
When entering shutdown, both amplifier outputs ramp
to GND quickly and simultaneously. To maximize click-
and-pop suppression, drive 

SHDN

to 0V before power-

up or power-down transitions.

MAX9777
MAX9778

R3

47k

Ω

R1
680k

Ω

R2

10k

Ω

R2

10k

Ω

HPS

V

DD

OUTL+

OUTR+

Figure 2. HPS Configuration Circuit

INPUTS

HPS_EN

HPS

MODE

GAIN PATH*

0

X

BTL

A or B

1

0

BTL

A or B

1

1

SE

A or B

Table 1b. MAX9778 HPS Setting

*Note:

A or B—Gain path selected by external GAINAB

Содержание MAX9777

Страница 1: ...external equalizer network The various functions are controlled by either an I2C compatible MAX9777 or simple parallel control interface MAX9778 The MAX9777 MAX9778 are available in a thermally effic...

Страница 2: ...0 C to 85 C Storage Temperature Range 65 C to 150 C Junction Temperature 150 C Lead Temperature soldering 10s 300 C ELECTRICAL CHARACTERISTICS VDD PVDD 5 0V GND PGND 0V VSHDN 5V CBIAS 1 F RIN RF 15k R...

Страница 3: ...jection Ratio Note 2 PSRR f 20kHz VRIPPLE 200mVP P 76 dB RL 32 88 Output Power POUT fIN 1kHz THD N 1 TA 25 C RL 16 200 mW POUT 60mW RL 32 0 002 Total Harmonic Distortion Plus Noise THD N fIN 1kHz BW 2...

Страница 4: ...Condition Hold Time tHD STA 0 6 s START Condition Setup Time tSU STA 0 6 s Clock Period Low tLOW 1 3 s Clock Period High tHIGH 0 6 s Data Setup Time tSU DAT 100 ns Data Hold Time tHD DAT Note 3 0 0 9...

Страница 5: ...AV 4V V POUT 250mW POUT 2W POUT 1W POUT 500mW TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY SPEAKER MODE MAX9777 78 toc05 FREQUENCY Hz THD N 10k 1k 100 0 01 0 1 1 0 001 10 100k RL 8 AV 2V V POUT...

Страница 6: ...OWER W THD N 1 5 1 0 0 5 0 01 10 1 0 1 100 0 001 0 2 0 AV 4V V RL 8 f 20Hz f 1kHz f 10kHz OUTPUT POWER vs AMBIENT TEMPERATURE SPEAKER MODE MAX9777 78 toc13 AMBIENT TEMPERATURE C OUTPUT POWER W 60 35 1...

Страница 7: ..._ AND OUT_ 1V div OUT_ OUT_ 500mV div SHDN 2V div TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY HEADPHONE MODE MAX9777 78 toc22 FREQUENCY Hz THD N 10k 1k 100 0 001 0 01 0 1 1 0 0001 10 100k RL 16...

Страница 8: ...BIENT TEMPERATURE C OUTPUT POWER mW 60 35 10 15 25 50 100 75 125 150 0 40 85 THD N 10 THD N 1 f 1kHz RL 32 OUTPUT POWER vs LOAD RESISTANCE HEADPHONE MODE MAX9777 78 toc32 LOAD RESISTANCE OUTPUT POWER...

Страница 9: ...40 C Typical Operating Characteristics continued VDD PVDD 5V GND PGND 0V VSHDN 5V CBIAS 1 F TA 25 C unless otherwise noted POWER SUPPLY REJECTION RATIO vs FREQUENCY HEADPHONE MODE MAX9777 78 toc35 FRE...

Страница 10: ...C unless otherwise noted SUPPLY CURRENT vs SUPPLY VOLTAGE HEADPHONE MODE MAX9777 78 toc40 SUPPLY VOLTAGE V SUPPLY CURRENT mA 5 25 5 00 4 75 2 4 6 8 10 12 0 4 50 5 50 TA 85 C TA 25 C TA 40 C POWER DISS...

Страница 11: ...Address Select A logic high sets the address LSB to 1 a logic low sets the address LSB to zero 16 16 HPS Headphone Sense Input A logic high configures the device as a single ended headphone amp A logi...

Страница 12: ...r into a 16 load with less than 1 THD N in headphone mode These devices also feature thermal overload protection BIAS These devices operate from a single 5V supply and fea ture an internally generated...

Страница 13: ...de disables the interface and resets the I2C registers to a default state A logic high on SHDN enables the devices MAX9777 Software Shutdown A logic high on bit 0 of the SHDN register places the MAX97...

Страница 14: ...requiring a pullup resistor 500 or greater to generate a logic high volt age Series resistors in line with SDA and SCL are option al These series resistors protect the input stages of the devices from...

Страница 15: ...e MAX9777 generates an ACK when receiving an address or data by pulling SDA low during the night clock period When transmitting data the MAX9777 waits for the receiving device to generate an ACK Monit...

Страница 16: ...ogic high selects input 1 a logic low selects input 2 Bit 2 HPS_D controls the headphone sensing A logic low configures the device in automatic headphone detection mode A logic high dis ables the HPS...

Страница 17: ...are high impedance inputs SDA has an open drain that pulls the data line low during the ninth clock pulse The communication protocol supports the standard I2C 8 bit communications The general call ad...

Страница 18: ...he BTL amplifier is disabled muting the speaker The gain is 1 2 that of the device in speaker mode and the output power is reduced by a factor of 4 In headphone mode the load must be capacitively coup...

Страница 19: ...ire output coupling capacitors to operate in single ended headphone mode The output coupling capacitor blocks the DC component of the amplifier output preventing DC cur rent from flowing to the load T...

Страница 20: ...low frequen cy response Figure 10 At low frequencies the capaci tor CF is an open circuit and the effective impedance in the feedback loop RF EFF is RF EFF RF1 At the frequency where the impedance CF...

Страница 21: ...INRA GAINRB OUTR HPS VDD 4 5V TO 5 5V 4 5V TO 5 5V PVDD 4 5V TO 5 5V 0 1 F 17 5 6 19 20 28 1 15 2 14 16 22 21 24 26 12 10 7 8 11 25 3 4 Typical Application Circuits Stereo 3W Audio Power Amplifiers wi...

Страница 22: ...__ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ HPF HPF MICROCONTROLLER CODEC MAX9778 INR2 INR1 INL2 INL1 BIAS 1 F 100 F 0 68 F 0 68 F 0 68 F 0 68 F 0 047 F 0 047 F 220 F 220 F 27 4k 27 4k 47k 10...

Страница 23: ...MAX9777 2 1 INPUT MUX INL1 10k 0 1 F 1 F 100 F 0 68 F 15k 1k 15k 0 68 F 0 68 F 0 68 F 4 5V TO 5 5V PVDD VDD 3 4 8 7 10 12 15k 15k 33 2k 27 4k 10k 10k 0 047 F 220 F 220 F 33 2k 27 4k 0 047 F 22 21 24 2...

Страница 24: ...1 INPUT MUX INL1 10k 0 1 F 1 F 100 F 0 68 F 15k 1k 15k 0 68 F 0 68 F 0 68 F 4 5V TO 5 5V PVDD VDD 3 4 8 7 10 12 15k 15k 33 2k 27 4k 10k 10k 0 047 F 220 F 220 F 33 2k 27 4k 0 047 F 22 21 24 26 16 11 25...

Страница 25: ..._ __ __ __ _ 25 TOP VIEW MAX9777 THIN QFN 26 27 25 24 10 9 11 INT V DD INL1 INL2 GAINLA 12 SDA INR2 GND BIAS GAINRA HPS ADD 1 2 PVDD 4 5 6 7 20 21 19 17 16 15 OUTR PGND OUTL PVDD OUTL PGND V DD INR1 3...

Страница 26: ..._ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ Package Information The p...

Страница 27: ...change the circuitry and specifications without notice at any time Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 ____________________ 27 2006 Maxim Integrated Produc...

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