MAX4684/MAX4685
0.5
Ω
/0.8
Ω
Low-Voltage, Dual SPDT
Analog Switches in UCSP
8
_______________________________________________________________________________________
V
GEN
GND
COM_
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
∆
V
OUT
Q = (
∆
V
OUT
)(C
L
)
NC_
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IL
TO V
IH
V+
R
GEN
IN_
MAX4684
MAX4685
OR NO_
Figure 4. Charge Injection
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V
V
OUT
V+
IN_
NC_
COM
NO
V
IN
MAX4684
MAX4685
OFF-ISOLATION = 20log
V
OUT
V
IN
ON-LOSS = 20log
V
OUT
V
IN
CROSSTALK = 20log
V
OUT
V
IN
NETWORK
ANALYZER
50
Ω
50
Ω
50
Ω
50
Ω
MEAS
REF
10nF
0V OR V+
50
Ω
GND
Figure 5. On-Loss, Off-Isolation, and Crosstalk
CAPACITANCE
METER
NC_ or
NO_
COM_
GND
IN
V
IL
OR
V
IH
10nF
V+
f = 1MHz
V+
MAX4684
MAX4685
Figure 6. Channel Off/On-Capacitance
Test Circuits/Timing Diagrams (continued)
TOP VIEW
NC2
IN1
GND
NC1
COM2
IN2
COM1
NO1
NO2
V+
3
✕
3 THIN QFN
9
8
10
7
6
2
3
1
4
5
MAX4684/MAX4685
Pin Configurations (continued)