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Maxim Integrated
Page 14 of 52
•
Set the RSTN pin low for 10ms.
•
While RSTN is low, set the MFIO pin to high.
•
After the 10ms has elapsed, set the RSTN pin high.
(MFIO pin should be set high at least 1ms
before RSTN pin is set high).
•
After an additional 50ms has elapsed, the MAX32664 is in application mode
and the application
performs its initialization of the application software..
•
After ~1 second from when the RSTN was set to high, the application completes the initialization
and the device is ready to accept I2C commands
Figure 5. Entering application mode using the RSTN pin and MFIO pin.
Communications to the MAX32664 over I
2
C
The host communicates to the MAX32664 through the I
2
C bus. The MAX32664 uses 0xAA as the I2C 8-bit
slave write address and 0
xX
AB is used as the I2C 8-bit slave read address. The maximum I2C data rate
supported is 3400 Kbps.
Bit Transfer Process
Both SDA and SCL signals are open-drain circuits. Each has an external pullup resistor that ensures each
circuit is high when idle. The I
2
C specification states that during data transfer, the SDA line can change
state only when SCL is low, and that SDA is stable and able to be read when SCL is high. Typical I
2
C
write/read transactions are shown in Figure 6.
Содержание MAX32664
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