16
PIN No.
NAME
DESCRIPTION
PW GND
OUT (-) 1
PV
CC1
OUT (+) 1
V
IN1
V
RI
V
CI
V
IN2
OUT (+) 2
PV
CC2
OUT (-) 2
PW GND
PW GND
OUT (-) 3
PV
CC3
OUT (+) 3
V
IN3
S GND
S V
CC
V
IN4
OUT (+) 4
P
VCC4
OUT (-) 4
PW GND
IC63 : TA2092N (POWER DRIVER)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Power GND
Connected to substrate.
, , , pin are connected inside.
Inverted output for CH1
Supply terminal of output stage for CH1
Supply terminal of output stage are not connected to other channel terminal.
Non-inverted output for CH1
Input for CH1. Not biased inside
Input reference voltage
Under condition of V
RI
1.8V, internal bias circuit is shut off.
No signal input condition : V
RI
= V
IN
Output reference voltage. V
OUT
= V
CI
= (V
CC
-V
F
)/2
Input for CH2
Non-inverted output for CH2
Supply terminal of output stage for CH2
Inverted output for CH2
Power GND
Power GND
Inverted output for CH3
Supply terminal of output stage for CH3
Non-inverted output for CH3
Input for CH3
Supply terminal of small signal GND
Small signal GND
Input for CH4
Non-invered output for CH4
Supply terminal of output stage for CH4
Inverted output for CH4
Power GND
BLOCK DIAGRAM
PIN FUNCTION
12
1
11
2
10
6
5
4
9
8
7
3
13
24
14
23
15
19
20
21
16
17
18
22
PW GND
PW GND
PV
CC4
PV
CC3
SV
CC1
SGND
PW GND
PW GND
PV
CC1
PV
CC2
V
CC
1
12
13
24
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