Pin
Symbol
Pin Name
I/O Pu/Pd STBY
Description
35
SCLK2/PF2
NC
I/O
L
unused
36
TBINT1/PH3
NC
I/O
L
unused
37
PB4
NC
I/O
L
unused
38
TB0OUT/TP1
NC
I/O
L
unused
39
INT6/PJ6
NC
I/O
L
unused
40
TB1OUT/PI1
NC
I/O
L
unused
41
PB5
NC
I/O
L
unused
42
TB2OUT/PI2
NC
I/O
L
unused
43
PB6
NC
I/O
L
unused
44
SDA1/SO1/PF4
PLL_SDA
I/O
L
CDCE913PWR data
45
SCL1/PF5
PLL_SCL
I/O
L
CDCE913PWR Clock
46
SCLK1/PE6
NC
I/O
L
unused
47
PB7
NC
I/O
L
unused
48
TB3OUT/PI3
NC
I/O
L
unused
49
INT1/PJ1
NC
I/O
L
unused
50
CEC/PK0
CD_BUS2
I/O
L
receive data from CD DSP (Oasis (64)pin OUT)
51
PK1/SCOUT
CD_BUS3
I/O
L
send command to CD DSP (Oasis (65)pin IN)
52
PI4/TB4OUT
BUCK
I/O
L
communication clock with CD DSP
53
PI5/TB5OUT
CCE
I/O
L
communication chip enable with CD DSP
54
PB0/TD0/SWV
DEBUG PORT
I/O
pu
H
debug port
55
PA0/TMS/SWDIO
DEBUG PORT
I/O
pu
H
debug port
56
PA1/TCK/SWCLK
DEBUG PORT
I/O
pd
L
debug port
57
TEST3
TEST3
H
unused
58
PJ7/INT7
DECRST
I/O
L
cd DSP reset
59
PB1/TDI
DEBUG PORT
I/O
pu
H
debug port
60
PB2/TRS-
DEBUG PORT
I/O
pu
H
debug port
61
PF3/RXIN1
NC
I/O
L
unused
62
DVCC
DVCC
P
3.3V power supply
63
DVSS
DVSS
G
GND
64
PA2/TRACECLK
STB_LED
I/O
L
standby led
65
PA3/TRACEDATA0 DIS_ON/OFF
I/O
H
display on/off
66
PA4/TRACEDATA1 VFD_RST
I/O
L
vfd reset pin
67
PA5/TRACEDATA2 VFD_DI
I/O
L
vfd di data pin
68
PA6/TRACEDATA3 VFD_CE
I/O
L
vfd enable pin
69
PA7
VFD_CLK
I/O
L
vfd clk pin
70
PJ0/INT0
NC
I/O
L
unused
71
CVCC
CVCC
P
3.3V power supply
72
X2
X1
H
stsyem clock 10MHz
73
CVSS
CVSS
G
GND
74
X1
X2
H
stsyem clock 10MHz
75
REGVSS
REGVSS
G
GND
76
REGVCC
REGVCC
P
3.3V power supply
77
XT1
NC
H
unused
78
XT2
NC
H
unused
79
PI6/TB4OUT
NC
I/O
L
unused
80
NMI
NMI
P
3.3V power supply
81
MODE
MODE
G
GND
82
RESET
RESET
I
H
mcu reset
83
PI7/TB4INT1
EEPROM_CLK
I/O
pu
L
eeprom clk
84
PH6/TB3INT0
EEPROM_DATA
I/O
pu
L
eeprom data
85
PH7/TB3INT1
POWER_H
I/O
L
power on
86
PJ2/INT2
POWER_DOWN
I/O
H
power down detect
87
PJ3/INT3
NC
I/O
L
unused
88
PJ4/TB60UT
NC
I/O
L
unused
89
PE3/RXINT0
STB_CHG_LED
I/O
H
IPOD Change LED Control
90
TST4
TEST4
H
unused
91
PC0/INT0
KEY0
I
H
AD key
92
PC1/INT1
KEY1
I
H
AD key
93
PC2/INT2
KEY2
I
H
standby key
94
PC3/INT3
NC
I
L
unused
95
PD0/INT4
NC
I
L
unused
96
PD1/INT5
VER_OPTION
I
pu
L
voltage detect
97
PD2/INT6
MODE_OPTION
I
pd
L
mode set
98
PD3/INT7
LD_CHK
I
L
cd LD check
99
PD4/INT8
PD
I
pd
L
unused
100
PD5/INT9
PD
I
pd
L
unused
55
Содержание CD5005
Страница 36: ...3 2 DAC Input Signal Waveform MCLK BLK DATA LRCK W5 W6 W7 W8 36...
Страница 40: ...Personal notes 40...
Страница 41: ...CD5005 Block Diagram NJM2068D BLOCK DIAGRAM 41...
Страница 42: ...POWER DIAGRAM 42...
Страница 52: ...Personal notes Personal notes 52...
Страница 56: ...TC94A92FG IC100 43 DCD 710AE TC94A92FG IC17 56...
Страница 63: ...2 FL DISPLAY V F D FUTABA 16ST103GINK U4003 PIN CONNECTION 1 43 63...