MagnaChip MC80C0104, Руководство пользователя, Страница: 30 / 126

MC80F0104/0204 Preliminary
26 Mar. 2005 Ver 0.2
00E1 RAM page selection register RPR R/W - - - - - 0 0 0 byte, bit
00E2 SIO mode control register SIOM R/W 0 0 0 0 0 0 0 1 byte, bit
00E3 SIO data shift register SIOR R/W Undefined byte, bit
00E6 UART mode register ASIMR R/W 0 0 0 0 - 0 0 - byte, bit
00E7 UART status register ASISR R - - - - - 0 0 0 byte
00E8 UART Baud rate generator control register BRGCR R/W - 0 0 1 0 0 0 0 byte, bit
00E9
UART Receive buffer register RXBR R 0 0 0 0 0 0 0 0
byte
UART Transmit shift register TXSR W 1 1 1 1 1 1 1 1
00EA Interrupt enable register high IENH R/W 0 0 0 0 0 0 0 0 byte, bit
00EB Interrupt enable register low IENL R/W 0 0 0 0 0 0 0 0 byte, bit
00EC Interrupt request register high IRQH R/W 0 0 0 0 0 0 0 0 byte, bit
00ED Interrupt request register low IRQL R/W 0 0 0 0 0 0 0 0 byte, bit
00EE Interrupt edge selection register IEDS R/W 0 0 0 0 0 0 0 0 byte, bit
00EF A/D converter mode control register ADCM R/W 0 0 0 0 0 0 0 1 byte, bit
00F0 A/D converter result high register ADCRH R(W) 0 1 0 Undefined byte
00F1 A/D converter result low register ADCRL R Undefined byte
00F2
Basic interval timer register BITR R Undefined
byte
Clock control register CKCTLR W 0 - 0 1 0 1 1 1
00F4
Watch dog timer register WDTR W 0 1 1 1 1 1 1 1
byte
Watch dog timer data register WDTDR R Undefined
00F5 Stop & sleep mode control register SSCR W 0 0 0 0 0 0 0 0 byte
00F7 PFD control register PFDR R/W - - - - - 0 0 0 byte, bit
00F8 Port selection register 0 PSR0 W 0 0 0 0 0 0 0 0 byte
00F9 Port selection register 1 PSR1 W - - - - 0 0 0 0 byte
00FC Pull-up selection register 0 PU0 W 0 0 0 0 0 0 0 0 byte
00FD Pull-up selection register 1 PU1 W - - - 0 0 0 0 0 byte
00FF Pull-up selection register 3 PU3 W - - 0 0 0 0 0 - byte
Address Register Name Symbol R/W
Initial Value
Addressing
Mode
7 6 5 4 3 2 1 0
Table 8-1 Control Registers
The ‘byte’ means registers are controlled by only byte manipulation instruction. Do not use bit manipulation
1.
The ‘byte, bit’ means registers are controlled by both bit and byte manipulation instruction.
2.
instruction such as SET1, CLR1 etc. If bit manipulation instruction is used on these registers,
content of other seven bits are may varied to unwanted value.
*The mark of ‘-’ means this bit location is reserved.
Caution) The R/W register except T1PDR and T3PDR are both can be byte and bit manipulated.