M5Stack ESP32-PICO-D4, Руководство пользователя

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3. FUNCTIONAL DESCRIPTION
This chapter describes the ESP32-PICO-D4 various modules and functions.
3.1. CPU AND MEMORY
ESP32-PICO-D4 contains two low-power Xtensa
® 32-bit LX6 MCU. On-chip
memory comprising:
⚫
448-KB of ROM, and the program starts for the kernel function calls
⚫
For a 520 KB instruction and data storage chip SRAM (including flash memory 8
KB RTC)
⚫
RTC flash memory of 8 KB SRAM, when the RTC can be started in Deep-sleep
mode, and for storing data accessed by the main CPU
⚫
RTC slow memory, of 8 KB SRAM, can be accessed by the coprocessor in Deep-
sleep mode
⚫
Of 1 kbit of eFuse, which is a 256 bit system-specific (MAC address and a chip
set); the remaining 768 bit reserved for user program, these
Flash program
include encryption and chip ID
3.2. STORAGE DESCRIPTION
3.2.1. External Flash and SRAM
ESP32 support multiple external QSPI flash and static random access memory
(SRAM), having a hardware-based AES encryption to protect the user programs
and data.
⚫
ESP32 access external QSPI Flash and SRAM by caching. Up to 16 MB external
Flash code space is mapped into the CPU, supports 8-bit, 16-bit and 32-bit
access, and can execute code.
⚫
Up to 8 MB external Flash and SRAM mapped to the CPU data space, support
for 8-bit, 16-bit and 32-bit access. Flash supports only read operations, SRAM
supports read and write operations.
ESP32-PICO-D4 4 MB of integrated SPI Flash, the code can be mapped into CPU
space, support for 8-bit, 16-bit and 32-bit access, and can execute code. Pin
GPIO6 ESP32 of, GPIO7, GPIO8, GPIO9, GPIO10 and GPIO11 for connecting
module integrated SPI Flash, not recommended for other functions.