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DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Core Architecture April 1998
5-16
DRAFT COPY
Lucent Technologies Inc.
5.3 Y Address Arithmetic Unit (YAAU)
(continued)
5.3.4 Addressing Modes (continued)
Virtual-Shift Addressing Mode (Modulo Addressing)
Figure 5-8 illustrates the use of the rb and re registers to establish an implicit delay line or circular shift register. A
program stores one word (Xn) at a time in memory, and Xn – k through Xn can be read out. Then, a new value
(Xn + 1) is stored, the oldest data (Xn – k) is lost, and the new sequence is read out. In a typical delay line or shift
register, all of the bits are shifted physically in each clock cycle. But, in this implementation, the data remains
stored at fixed memory locations and one pointer or addressing register is moved to generate the desired
sequence of writing and reading. Two concepts are applied in this technique: the first describes how the circular
register in memory is established, and the second describes the sequence of reading and writing data into and out
of memory.
1. The rb and re registers contain addresses that define the boundaries of the cyclical (or circular) register. The
rb register contains the address for the beginning data word in the figure, and the re register contains the
address for the end data word. A single pointer register, such as r1, contains an address that increments as
the pointer advances through the memory. If the pointer register address equals the address in re
1
and the
current instruction calls for a postincrement, the address in rb is placed in the pointer register instead of the
next count increment. The pointer, thus, moves from the bottom location to the top and then continues on
down. This forms a closed loop that will continually cycle. Program control of the pointer can generate differ-
ent sequences from this closed loop as described in the second concept.
2. In sequence 1, the pointer starts at address 5 and new data (Xn + 1) is written over old data. The pointer
increments and Xn – 5 is read out followed by sequential reads until Xn + 1 is read out. Sequence 2 then
starts with the pointer moving to address 6, and new data (Xn + 2) is written over Xn – 5. The pointer incre-
ments, and data is read from locations 7, 1, . . . , 6. The sequences can continue indefinitely.
Note: There are eight counts in a sequence and seven memory locations so the starting location is incre-
mented each sequence.
5-4125
Figure 5-8. Use of the rb and re Registers
1.Modulo addressing works only with *rM++, *rMpz, or *rMzp.
addr N pointer
rb
1
re 7
N
Xn + 1
Xn – 3
Xn – 2
Xn – 1
Xn
Xn – 5
Xn – 4
start
end
SEQUENCE 1
po
in
te
r (
rM
)
1
2
3
4
5
6
7
read
read
read
read
read
read
read
write
Xn – 5, Xn – 4, Xn – 3, . . . , Xn + 1
Xn + 1
Xn – 3
Xn – 2
Xn – 1
Xn
Xn + 2
Xn – 4
start
end
SEQUENCE 2
po
in
te
r (
rM
)
1
2
3
4
5
6
7
read
read
read
read
read
read
read
write
Xn – 4, Xn – 3, . . . , Xn + 2
RAM
data
data
address
N
address
RAM
rb
re