SCSI Registers
4-71
R
Reserved
[7:5]
SBMC
SCSI Bus Mode Change
4
Setting this bit allows the LSI53C1000 to generate an
interrupt when the DIFFSENS pin detects a change in
voltage level that indicates the SCSI bus has changed
between SE, LVD, or HVD modes. For example, when
this bit is cleared and the SCSI bus changes modes, INT/
does not assert and the SIP bit in the
register is not set. However, bit 4 in the
SCSI Interrupt Status One (SIST1)
register is set. Setting
this bit allows the interrupt to occur.
R
Reserved
3
STO
Selection or Reselection Time-out
2
This bit is set when the SCSI device which the
LSI53C1000 is attempting to select or reselect does not
respond within the programmed time-out period. See the
description of the
register,
bits [3:0], for more information on the time-out timer.
GEN
General Purpose Timer Expired
1
This bit is set when the general purpose timer expires.
The time measured is the time between enabling and
disabling of the timer. See the description of the
register, bits [3:0], for more
information on the general purpose timer.
HTH
Handshake-to-Handshake Timer Expired
0
This bit is set when the handshake-to-handshake timer
expires. The time measured is the SCSI Request-to-
Request (target) or Acknowledge-to-Acknowledge
(initiator) period. See the description of the
register, bits [7:4], for more information on
the handshake-to-handshake timer.
Содержание LSI53C1000
Страница 6: ...vi Preface...
Страница 16: ...xvi Contents...
Страница 28: ...1 12 Introduction...
Страница 234: ...4 124 Registers...
Страница 314: ...6 40 Specifications This page intentionally left blank...
Страница 318: ...6 44 Specifications This page intentionally left blank...
Страница 344: ...6 70 Specifications This page intentionally left blank...
Страница 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Страница 352: ...6 78 Specifications...
Страница 360: ...A 8 Register Summary...
Страница 376: ...IX 12 Index...