5
dc1718afb
DEMO MANUAL DC1718A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
schematic Diagram
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
A0
0
1
1
3
2
13
VC
C
VC
C
VC
C
VC
C
T
E
C
H
N
OLOGY
1
T
u
es
d
ay
,
J
une
0
8,
20
10
11
1
6
-B
IT
DE
L
T
A
S
IG
MA
I2
C A
DC
N
/A
LTC
2471C
D
D
D
E
M
O
C
IR
C
U
IT
1718A
T
E
C
H
N
OLOGY
1
T
u
es
d
ay
,
J
une
0
8,
20
10
11
1
6
-B
IT
DE
L
T
A
S
IG
MA
I2
C A
DC
N
/A
LTC
2471C
D
D
D
E
M
O
C
IR
C
U
IT
1718A
T
E
C
H
N
OLOGY
1
T
u
es
d
ay
,
J
une
0
8,
20
10
11
1
6
-B
IT
DE
L
T
A
S
IG
MA
I2
C A
DC
N
/A
LTC
2471C
D
D
D
E
M
O
C
IR
C
U
IT
1718A
R
E
V
IS
ION
H
IS
T
OR
Y
DESCRI
PT
IO
N
DAT
E
APPRO
VED
ECO
REV
L
EO
C.
F
IRST
PRO
T
O
T
Y
PE
1
06/
04/
10
R
E
V
IS
ION
H
IS
T
OR
Y
DESCRI
PT
IO
N
DAT
E
APPRO
VED
ECO
REV
L
EO
C.
F
IRST
PRO
T
O
T
Y
PE
1
06/
04/
10
R
E
V
IS
ION
H
IS
T
OR
Y
DESCRI
PT
IO
N
DAT
E
APPRO
VED
ECO
REV
L
EO
C.
F
IRST
PRO
T
O
T
Y
PE
1
06/
04/
10
U2
24LC
025-
I/ST
U2
24LC
025-
I/ST
A0
1
A1
2
A2
3
GND
4
SD
A
5
SC
L
6
WP
7
VCC
8
R2
4.99K
1%
R2
4.99K
1%
C
2
0.1uF
C
2
0.1uF
R3
4.99K
1%
R3
4.99K
1%
J
P1
J
P1
COM
P
IN
REF
-
REF
OUT
VCC
GND
GND
SC
L
SD
A
GND
GND
A0
U1
L
T
C
2471C
D
D
COM
P
IN
REF
-
REF
OUT
VCC
GND
GND
SC
L
SD
A
GND
GND
A0
U1
L
T
C
2471C
D
D
1
6
2
5
4
8
9
7
10
11
12
3
C4
0.1uF
C4
0.1uF
E1
IN
E1
IN
C6
10uF
C6
10uF
C3
0.1uF
C3
0.1uF
E2
R
E
F
OUT
E2
R
E
F
OUT
J
1
J
1
5V
2
SC
K/
SC
L
4
CS
6
GND
8
EEVC
C
10
EEG
N
D
12
NC
14
V
UNRE
G
1
GND
3
M
ISO
5
M
OS
I/S
D
A
7
EESD
A
9
EESC
L
11
GND
13
R4
4.99K
1%
R4
4.99K
1%
C
5
0.1uF
C
5
0.1uF
R
1
1K
R
1
1K
E4
GND
E4
GND
E3
VC
C
E3
VC
C
C
1
0.1uF
C
1
0.1uF
