7
dc1533af
DEMO MANUAL DC1533A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SCHEMATIC DIAGRAM
R4
0 Ohm
R2
60.
4
k
E4
SYN
C
SE
E
FI
G
URE
2
F
O
R
*
JP
1
1
2
3
VO
U
T
-
U1
L
T
M
8045E
Y
VIN
H5
VIN
H4
VIN
G5
VIN
G4
SYN
C
E1
RUN
G3
GND
C1
GND
C2
GND
C3
GND
C4
GND
C5
GND
D4
GND
D5
GN
D
H2
GND
E2
GND
E3
GND
E4
GND
E5
GND
F2
GND
F3
GND
F4
GN
D
G2
GN
D
H1
GND
D1
VO
U
T
+
B1
VO
U
T
+
A2
VO
U
T
+
A1
SS
F1
RT
G1
GND
D2
GND
D3
GND
F5
GN
D
H3
VO
U
T
+
B2
FB
A3
VO
U
T
-
A4
VO
U
T
-
A5
VO
U
T
-
B4
VO
U
T
-
B5
GND
B3
E6
GN
D
+
CIN1
4
7uF
50
V
L1
1.
0
u
H
C4
47
uF
16
V
12
10
L
Q
H4
3
CN1
R
0
M
0
3
C3
10
nF
0603
6.
3
m
m
D
IA
RUN
CO
NT
RO
L
R1
1
30k
TH
E M
AX
IM
UM
O
UT
PUT
CURR
EN
T
R3
OP
T
VO
U
T
-
VE
RS
US
V
IN.
E5
-5
V
7
00k
H
z
E1
VI
N
L
Q
H4
3
CN1
R0
M
0
3
VOU
T-
E2
GN
D
OF
F
ON
C2
22uF
16V
OP
T
*
OP
T
E3
GN
D
N
O
TE
: U
N
LESS
O
TH
ER
W
ISE S
PEC
IF
IE
D
1.
A
LL
R
ESIST
O
RS A
RE
0
60
3 1
%
.
2.
A
LL
CAP
ACI
TO
RS
ARE
1
20
6.
L2
1.
0uH
C5
4.
7
u
F
25
V
OP
T
OP
T
C1
4.
7
u
F
25
V
R5
OP
T
R6
OP
T
2.
8V
-
18V
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