5
dc1954af
DEMO MANUAL DC1954A
typical Dc1954a reQuirements anD characteristics
pcb layout
PARAMETER
INPUT OR OUTPUT PHYSICAL LOCATION
DETAILS
3.3V Power Supply Input
J11 and J10 Banana Jacks, or 3.15V-3.45V and
GND Turrets
Low-Noise and Spur-Free 3.3V, ≥400mA Capable Power
Supply; Typically DC1954 Consumes ~300mA; Powers
LTC6954, U2, U3, and U4
OUT0+, OUT0–
Two Outputs
J1 and J2 SMA Connectors*
Refer to Figure 1 or Table 1 for Output Type
If LVPECL:
AC-Coupled
If LVDS/CMOS:
DC-Coupled
Refer to LTC6954 Data Sheet for Output Levels for LVPECL, or
LVDS/CMOS Option
OUT1+, OUT1–
Two Outputs
J3 and J4 SMA Connectors*
OUT2+, OUT2–
Two Outputs
J5 and J6 SMA Connectors*
OUT0SEL
Input
JP1 3-Pin Headers
If LVPECL:
OUTxSEL=H: IBIAS=ON, for Default LVPECL BOM
OUTxSEL=L: IBIAS=OFF, Must Install External Pull-Down
Resistor, Refer to schematic
If LVDS/CMOS:
OUTxSEL=H: LVDS, Default LVDS/CMOS BOM
OUTxSEL=L: CMOS, Remove 100Ω Differential Termination,
Refer to Schematic
OUT1SEL
Input
JP2 3-Pin Headers
OUT2SEL
Input
JP3 3-Pin Headers
TEMP
Input/Output
Turret
Temperature Monitoring Diode; Force Current Measure
Voltage, Refer to Data Sheet
TEMP GND
Input
Turret
SYNC
Input
J7 SMA Connector and Turret
EZSync, 0V to 3.3V Control Signal, Refer to the Data Sheet
IN+, IN–
Input
J8 and J9 SMA Connectors
Input Signal Pins
*Any unused RF output
must
be powered down or terminated with 50Ω, or poor spurious performance may result.
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