2
dc1705cfb
DEMO MANUAL DC1705C
PARAMETER
INPUT OR OUTPUT
PHYSICAL LOCATION
DETAILS
3.3V Power Supply
Input
3.3V and GND Banana Jacks
Low Noise and Spur-Free 3.3V, 115mA
5V Power Supply
Input
5V and GND Banana Jacks
Low Noise and Spur-Free 5V, 45mA
REF
+
IN, Reference Frequency
Input
J1 SMA Connector
Low Noise 10MHz or 100MHz*, 6dBm into 50Ω
(Note 1)
REF OUT, Buffered Reference
Output
J3 SMA Connector
Frequency = f
REF
, 0dBm
RF
+
and RF
–
Two Outputs
J4 and J5 SMA Connectors
Frequency: 900MHz*, Power: 0dBm, Frequency
Range: Depends on the version of the LTC6946
device – refer to Table 1, Step Size: 200kHz*
Loop Bandwidth
–
Set by Loop Filter Component Values 47kHz*
* These frequencies are for the DC1705C pllset files included with PLLWizard.
Note 1:
A low noise 10MHz or 100MHz reference frequency, such as the Wenzel 501-04608A or 501-04516D OCXO, is recommended. If using a different
frequency, make sure to update the f
REF
and R_DIV boxes under the System tab in PLLWizard so that f
PFD
is still 1MHz. For example, if a 20MHz clock is
used, f
REF
should be changed to 20MHz and R_DIV to 20. REF BST and FILT under the System tab in PLLWizard might need to be changed if the reference
frequency and/or power is different than what is recommended in the table above. More information can be found in the LTC6946 data sheet.
Table 1. DC1705C Options and Frequency Ranges
ASSEMBLY VERSION
PART NUMBER
VCO FREQUENCY RANGE (GHz)
OUTPUT DIVIDER SETTINGS
DC1705C-A
LTC6946IUFD-1
2.240 to 3.740
Integers 1 through 6
DC1705C-B
LTC6946IUFD-2
3.080 to 4.910
Integers 1 through 6
DC1705C-C
LTC6946IUFD-3
3.840 to 5.790
Integers 1 through 6
DC1705C-D
LTC6946IUFD-4
4.200 to 6.390
Integers 1 through 6
TYPICAL DC1705C REQUIREMENTS AND CHARACTERISTICS
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