Linear Technology DC1281A, Демонстрационное руководство

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dc1281af
DEMO MANUAL DC1281A
If the DC1281A demonstration circuit is properly connected
to the DC890, PScope should automatically detect the
DC1281A, and configure itself accordingly. If necessary
the procedure below explains how to manually configure
PScope.
Under the Configure menu, go to ADC Configuration....
Check the Config Manually box and use the following
configuration options, see Figure 2:
QUICK START PROCEDURE
Manual configuration settings:
Bits: 16
Alignment: 16
FPGA Ld: LVDS
Channs: 1
Bipolar: Checked
Positive-Edge Clk: Checked
If everything is hooked up properly, powered and a suit-
able convert clock is present, clicking the Collect button
should result in time and frequency plots displayed in
the PScope window. Additional information and help for
PScope is available in the DC890 Quick Start Guide and in
the online help available within the PScope program itself.
Figure 2: ADC Configuration
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
1 5 C1-C3, C6-C7 CAP~X7R~0.01μF~16V~10%~0603 AVX/0603YC103KAT
2 2 C13, C17 CAP~X5R~2.2μF~10V~20%~0805 AVX/0805ZD225MAT
3 3 C14, C24, C38 CAP~X5R~4.7μF~10V~20%~0805 AVX/0805ZD475MAT
4 15 C15-C16, C20, C22, C25-C32, C34-C36 CAP~X5R~0.1μF~10V~10%~0402 AVX/0402ZD104KAT
5 0 C18-C19 (Option) CAP~X7R~0.1μF~16V~10%~0603 AVX/0603YC104KAT
6 1 C4 (ALSO C9-C10 OPTIONS) CAP~NPO~8.2pF~50V~0.25pF~0402 AVX/04025A8R2CAT2A
7 2 C5, C12 CAP~X5R~0.01μF~16V~10%~0402 AVX/0402YC103KAT
8 3 J2-J4
HEADER~3
×
2~2mm
SAMTEC, TMM-103-02-L-D
9 0 J9 (OPTION)
HEADER~3
×
2~2mm
SAMTEC, TMM-103-02-L-D
10 2 J5, J7 CONN~SMA 50Ω EDGE-LAUNCH AMPHENOL_CONNEX/132357
11 2 R42-R43 FERRITE BEAD~SMT~1206 MURATA/BLM31PG330SN1L
12 2 R9-R10 RES~10Ω~1%~1/16~0402 VISHAY, CRCW040210R0FKED
13 1 R15 RES~100Ω~1%~1/16~0402 VISHAY, CRCW0402100RFKED