3
DEMO MANUAL DC116
HOT SWAP CONTROLLER
SCHE ATIC DIAGRA
W
W
DC116A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
J101
A1
B1
B2
B3
B4
B5
B6
B7
B8
C1
C2
C3
C4
C5
C6
C7
C8
A2
A3
A4
A5
A6
A7
A8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
MILLIPACS
HM1G41FBR000H6
BOLD LINES INDICATE
HIGH CURRENT PATHS
V
CC1
V
DD1
V
EE1
V
EE2
V
DD2
V
DD2
V
CC2
V
CC2
V
DD2
V
EE2
R1
0.005
Ω
SETLO
GATELO
OUTLO
TP3
SETHI
C7
0.1
µ
F
C1
0.1
µ
F
C2
0.047
µ
F
TP12
TP8
TP16
TP15
S2
RESET
RESET
TP1
V
CC1
TP9
TP10
TP11
RESET
COMPOUT
REF
TP14
DC116 SDa
R22
7.5k
1%
TP7
TP6
TP5
+
+
R21
20k
1%
R6
10k
5%
R7
19.6k
1%
R9
20k
1%
R10
7.15k
1%
R8
2.55k
1%
R11
205k
1%
R19
470
Ω
R12
23.2k
1%
C9, 0.1
µ
F
+
R18
470
Ω
R20
470
Ω
R4
20k
R14
1.5k
C6
0.1
µ
F
R3
0.025
Ω
R23
0
Ω
R5
16k
Q2
Si4410DY
SILICONIX
Q3
Si4410DY
SILICONIX
Q1
MTB50N06E
R16
1.5k
R17
1.5k
R15
1.5k
C4
1000
µ
F
25V
C5
2200
µ
F
16V
C3
1000
µ
F
25V
R13, 470
Ω
D6
RED
D8
AMBER
D1
RED
TP13
TP2
TP4
D4
RED
D2
RED
D3
GRN
D7
GRN
COMP
–
COMP
+
D5
GRN
U1
LTC1421CSW
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
CON1
CON2
POR
FAULT
DISABLE
PWRGD
RESET
REF
CPON
RAMP
FB
GND
AUXV
CC
V
CCLO
SETLO
GATELO
V
OUTLO
V
CCHI
SETHI
GATEHI
V
OUTHI
COMPOUT
COMP
–
COMP
+
S1
S8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C8
1
µ
F
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