LT8708
47
Rev 0
where DC
CLKOUT
is the CLKOUT duty cycle in % and T
J
is the die junction temperature in °C. The actual die tem-
perature can deviate from the above equation by ±10°C.
THERMAL SHUTDOWN
If the die junction temperature reaches approximately
165°C, the part will go into thermal shutdown. The power
switches will be turned off and the INTV
CC
and LDO33
regulators will be turned off (see Figure 2). The part will
be re-enabled when the die temperature has dropped by
~5°C (nominal). After re-enabling, the part will start in the
SWITCHER OFF 1 state as shown in Figure 2. The part
will then INITIALIZE, perform a SOFT-START, then enter
NORMAL OPERATION as long as the die temperature
remains below approximately 165°C.
EFFICIENCY CONSIDERATIONS
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Although all dissipative elements
in the circuit produce losses, three main sources account
for most of the losses in LT8708 circuits. These and a few
additional loss components are listed below:
1. Switching losses. These losses arise from the brief
amount of time the switches (M1 – M4) spend in the
saturated region during switch node transitions. Power
loss depends upon the input voltage, load current,
driver strength and MOSFET capacitance, among other
factors. See the Power MOSFET Selection section for
more details.
2. DC I
2
R losses. These arise from the resistances of
the MOSFETs (M1 – M4), sensing resistors, inductor
and PC board traces and cause the efficiency to drop
at high currents.
3. INTV
CC
current. This is the sum of the MOSFET driver
current, LDO33 pin current and control currents. The
INTV
CC
regulator’s input voltage times the current
represents lost power. This loss can be reduced by
supplying INTV
CC
current through the EXTV
CC
pin
APPLICATIONS INFORMATION
from a high efficiency source, such as the output or
alternate supply if available. Also, lower capacitance
MOSFETs can reduce INTV
CC
current and power loss.
4. C
IN
and C
OUT
loss. The C
IN
capacitor has the difficult job
of filtering the large RMS input current to the regulator
in buck mode. The C
OUT
capacitor has the more difficult
job of filtering the large RMS output current in boost
mode. Both C
IN
and C
OUT
are required to have low
ESR to minimize the AC I
2
R loss and have sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5. Other losses. Schottky diodes D1, D2, D3 and D4 are
responsible for conduction losses during dead time
and light load conduction periods. Inductor core loss
occurs predominately at light loads.
Hybrid conduction mode (HCM) can be used to improve
the efficiency when large inductor current ripples are
present in DCM. See the Unidirectional Conduction: HCM
section for details.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If one
makes a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
CIRCUIT BOARD LAYOUT CHECKLIST
The basic circuit board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board pro-
vides heat sinking for power components.
• The ground plane layer should not have any traces
and should be as close as possible to the layer with
the power MOSFETs.
• The high di/dt path formed by switch M1, switch M2,
D1, R
SENSE
and the C
IN
capacitor should be compact
with short leads and PC trace lengths. The high di/
dt path formed by switch M3, switch M4, D2 and the
C
OUT
capacitor also should be compact with short
leads and PC trace lengths. Two layout examples are
shown in Figure 18 (a) and (b).